Electronic Components Datasheet Search |
|
MC100EP16VSDTR2 Datasheet(PDF) 1 Page - ON Semiconductor |
|
MC100EP16VSDTR2 Datasheet(HTML) 1 Page - ON Semiconductor |
1 / 12 page © Semiconductor Components Industries, LLC, 2006 December, 2006 − Rev. 5 1 Publication Order Number: MC100EP16VS/D MC100EP16VS 3.3V / 5VECL Differential Receiver/Driver with Variable Output Swing Description The MC100EP16VS is a differential receiver with variable output amplitude. The device is functionally equivalent to the 100EP16 with an input pin that controls the amplitude of the outputs. The VCTRL input pin controls the output amplitude of the EP16VS and is referenced to VCC. (See Figure 4.) The operational range of the VCTRL input is from ≤ VBB (max output amplitude) to VCC (min output amplitude). (See Figure 3.) A variable resistor between the VCC and VBB pins, with the wiper driving VCTRL, can control the output amplitude. Typical application circuits and a VCTRL Voltage vs. Output Amplitude graph are described in this data sheet. When left open, the VCTRL pin will be internally pulled down to VEE and operate as a standard EP16, with 100% output amplitude. The VBB pin, an internally generated voltage supply, is available to this device only. For single−ended input conditions, the unused differential input is connected to VBB as a switching reference voltage. VBB may also rebias AC coupled inputs. When used, decouple VBB and VCC via a 0.01 mF capacitor and limit current sourcing or sinking to 0.5 mA. When not used, VBB should be left open. Features • 220 ps Propagation Delay • Maximum Frequency > 4 GHz Typical (See Graph) • The 100 Series Contains Temperature Compensation • PECL Mode Operating Range: VCC = 3.0 V to 5.5 V with VEE = 0 V • NECL Mode Operating Range: VCC = 0 V with VEE = −3.0 V to −5.5 V • Open Input Default State • Q Output Will Default LOW with Inputs Open or at VEE • Pb−Free Packages are Available *For additional marking information, refer to Application Note AND8002/D. A = Assembly Location L = Wafer Lot Y = Year W = Work Week M = Date Code G = Pb−Free Package ALYWG G KP62 MARKING DIAGRAMS* SOIC−8 D SUFFIX CASE 751 TSSOP−8 DT SUFFIX CASE 948R 1 8 1 8 See detailed ordering and shipping information in the package dimensions section on page 9 of this data sheet. ORDERING INFORMATION http://onsemi.com 1 8 KEP62 ALYW G 1 8 DFN8 MN SUFFIX CASE 506AA 14 (Note: Microdot may be in either location) |
Similar Part No. - MC100EP16VSDTR2 |
|
Similar Description - MC100EP16VSDTR2 |
|
|
Link URL |
Privacy Policy |
ALLDATASHEET.NET |
Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |