MC74VHCT259AMELG datasheet(6/9 Pages) ONSEMI

Part #	MC74VHCT259AMELG

Description	8?묪it Addressable Latch/1?뭥f?? Decoder CMOS Logic Level Shifter with LSTTL?묬ompatible Inputs

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Manufacturer	ONSEMI [ON Semiconductor]

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MC74VHCT259A

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TIMING REQUIREMENTS (Input tr = tf = 3.0ns)

Symbol

Parameter

Test Conditions

TA = 25°C

TA = ≤ 85°C TA = ≤ 125°C

Unit

Min

Typ

Max

Min

Max

Min

Max

tw

Minimum Pulse Width, Reset or Enable

(Figure 10)

VCC = 3.3 ± 0.3V

5.0

5.5

ns

VCC = 5.0 ± 0.5V

5.0

5.5

tsu

Minimum Setup Time, Address or Data to Enable

(Figure 10)

VCC = 3.3 ± 0.3V

4.5

ns

VCC = 5.0 ± 0.5V

3.0

th

Minimum Hold Time, Enable to Address or Data

(Figure 8 or 9)

VCC = 3.3 ± 0.3V

2.0

ns

VCC = 5.0 ± 0.5V

2.0

tr, tf

Maximum Input, Rise and Fall Times

(Figure 6)

VCC = 3.3 ± 0.3V

400

300

ns

VCC = 5.0 ± 0.5V

200

100

50%

tPHL

50%

tPHL

DATA IN

ADDRESS

SELECT

OUTPUT Q

VCC

GND

VCC

GND

VCC

GND

*Includes all probe and jig capacitance

Figure 6. Switching Waveform

CL*

TEST POINT

DEVICE

UNDER

TEST

OUTPUT

OUTPUT Q

DATA IN

50%

tPLH

tPHL

tf

GND

VCC

50%

Figure 7. Switching Waveform

tr

Figure 8. Switching Waveform

Figure 9. Switching Waveform

Figure 10. Switching Waveform

Figure 11. Test Circuit

50%

tw

50%

tPHL

DATA IN

OUTPUT Q

RESET

VCC

GND

VCC

GND

VCC

GND

VCC

GND

DATA IN

OUTPUT Q

ENABLE

DATA IN

OR

ADDRESS

SELECT

ENABLE

VCC

GND

VCC

GND

tw

50%

tPHL

50%

tsu

th(H)

tsu

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