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MC74VHCT74ADT Datasheet(PDF) 3 Page - ON Semiconductor |
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MC74VHCT74ADT Datasheet(HTML) 3 Page - ON Semiconductor |
3 / 6 page MC74VHCT74A http://onsemi.com 3 AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3.0ns) Symbol Parameter Test Conditions TA = 25°C TA = − 40 to 85°C Unit Min Typ Max Min Max tPLH, tPHL Maximum Propagation Delay, CP to Q or Q VCC = 5.0 ± 0.5V CL = 15 pF CL = 50 pF 5.8 6.3 7.8 8.8 1.0 1.0 9.0 10.0 ns tPLH, tPHL Maximum Propagation Delay, SD or RD to Q or Q VCC = 5.0 ± 0.5V CL = 15 pF CL = 50 pF 7.6 8.1 10.4 11.4 1.0 1.0 12.0 13.0 ns fmax Maximum Clock Frequency (50% Duty Cycle) VCC = 5.0 ± 0.5V CL = 15 pF CL = 50 pF 100 80 160 140 80 65 MHz Cin Maximum Input Capacitance 4 10 10 pF CPD Power Dissipation Capacitance (Note 1) Typical @ 25 °C, VCC = 5.0 V pF 24 1. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC(OPR) = CPD VCC fin + ICC / 2 (per flip−flop). CPD is used to determine the no−load dynamic power consumption; PD = CPD VCC2 fin + ICC VCC. TIMING REQUIREMENTS (Input tr = tf = 3.0 ns) Symbol Parameter VCC V Guaranteed Limit Unit TA = 25°C TA = − 40 to 85°C tw Minimum Pulse Width, CP 5.0 ± 0.5 5.0 5.0 ns tw Minimum Pulse Width, RD or SD 5.0 ± 0.5 5.0 5.0 ns tsu Minimum Setup Time, D to CP 5.0 ± 0.5 5.0 5.0 ns th Minimum Hold Time, D to CP 5.0 ± 0.5 0.0 0.0 ns trec Minimum Recovery Time, SD or RD to CP 5.0 ± 0.5 3.5 3.5 ns ORDERING INFORMATION Device Package Shipping† MC74VHCT74AD SOIC−14 55 Units / Rail MC74VHCT74ADR2 SOIC−14 2500 / Tape & Reel MC74VHCT74ADR2G SOIC−14 (Pb−Free) 2500 / Tape & Reel MC74VHCT74ADT TSSOP−14* 96 Units / Rail MC74VHCT74ADTR2 TSSOP−14* 2500 / Tape & Reel MC74VHCT74ADTR2G TSSOP−14* 2500 / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *This package is inherently Pb−Free. |
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