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SP8854D Datasheet(PDF) 11 Page - Zarlink Semiconductor Inc |
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SP8854D Datasheet(HTML) 11 Page - Zarlink Semiconductor Inc |
11 / 14 page SP8854D 3 PIN DESCRIPTION PIN DESCRIPTION 1,2,3,4,5,6,7,8,9,10,11,42,43,44 These pins are the data inputs used to set the RF divider ratio (M.N+A). Open circuit=1 (high) on these pins. Data is transparent from pins to RF buffer when Pin 39 (strobe) is HI and frozen in RF buffer when Pin 39 is LO. 13, 14 (RF INPUT) Balanced inputs to the RF pre–amplifier. For single ended operation the signal is AC coupled into pin 13 with pin 14 AC decoupled to ground (or vice–versa.) Pins 13 and 14 are internally DC biased. 17 (LOCK DETECT INPUT) A current sink into this pin is enabled when the lock detect circuit indicates lock. Used to give an external indication of phase lock. 18 (C–LOCK DETECT) A capacitor connected to this point determines the lock detect integrator time constant and can be used to vary the sensitivity of the phase lock indicator. 19 (Rset) An external resistor from Pin 19 to VCC sets the charge pump output current. 20 (CP OUTPUT) The phase detector output is a single ended charge pump sourcing or sinking current to the inverting input of an external loop filter. 21 (CP REF) Connected to the non–inverting input of the loop filter to set the optimum DC bias. 22 (Fref/Fpd ENABLE) Part of the input bus. When this pin is logic HI the Fref and Fpd outputs are en- abled. Open circuit=HI. 23 (CONTROL DIRECTION) This pin controls charge pump output direction. For Pin 23 HI the output sinks current when Fpd > Fref or when the RF phase leads Ref phase. for Pin 23 LO the relationship is reversed. (see table 2). 24 =Fpd if Pin 23 is HI =Fref if Pin 23 is LO RF divider output pulses. Fpd=RF input frequency/(M.N+A). Pulse width=8 RF input cycles (1 cycle of the divide by 8 prescaler output). 25 =Fref if Pin 23 is HI =Fpd if pin 23 is LO Reference divider output pulses. Fref=Reference input frequency/R. Pulse width =high period of Ref input. 27 (Reference Oscillator Capacitor) Leave open circuit if an external reference is used. See Fig. 5 for typical connection for use as an onboard crystal oscillator. 28 (Ref IN/XTAL) This pin is the input buffer amplifier for an external reference signal. This amplifier provides the active element if an onboard crystal oscillator is used. 29,30,31,32,33,34,35,36,37,38 These pins set the Reference divider ratio R. Open circuit =HI. 39 (Strobe) When Pin 39 is HI the A, M, and R counters are held in the reset state and the charge pump output is disabled. When Pin 39 is low the data on the RF data and PD Gain data inputs is fixed in the buffers, the buffers are loaded into the RF counters and the PD Gain control, all the counters are active, and the charge pump is enabled. Open circuit =HI. 40, 41 (PD Gain) These pins set the charge pump current multiplication factor (see table 1). The data is transparent into the buffers when Pin 39 is HI and frozen when Pin 39 is LO. Open circuit =HI. |
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