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MSP430P337AIPJM Datasheet(PDF) 9 Page - Texas Instruments |
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MSP430P337AIPJM Datasheet(HTML) 9 Page - Texas Instruments |
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9 / 39 page  MSP430C33x, MSP430P337A MIXED SIGNAL MICROCONTROLLERS SLAS227A – OCTOBER 1999 – REVISED JUNE 2000 9 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 operation modes and interrupts (continued) interrupt flag registers 1 and 2 76 5 4 0 P0IFG.1 OFIFG WDTIFG 32 1 rw-0 rw-1 rw-0 Address 02h NMIIFG P0IFG.0 rw-0 rw-0 WDTIFG: Set on overflow or security key violation or Reset on VCC1 power-on or reset condition at RST/NMI-pin OFIFG: Flag set on oscillator fault P0IFG.0: Dedicated I/O P0.0 P0IFG.1: P0.1 or 8-Bit Timer/Counter, RXD NMIIFG: Signal at RST/NMI-pin 76 5 4 0 UTXIFG URXIFG rw 32 1 rw-1 rw-0 Address 03h BTIFG URXIFG: USART receive flag UTXIFG: USART transmit flag BTIFG: Basic Timer1 flag module enable registers 1 and 2 76 5 4 0 32 1 Address 04h 76 5 4 0 UTXE URXE/USPIE 32 1 rw-0 rw-0 Address 05h Bit 0: USART mode: USART receive enable, URXE SPI mode: SPI enable, USPIE Bit 1: USART mode: USART transmit enable, UTXE SPI mode: not applicable Legend rw: rw-0: Bit can be read and written Bit can be read and written. It is reset by PUC. SFR bit not present in device |
Similar Part No. - MSP430P337AIPJM |
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Similar Description - MSP430P337AIPJM |
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