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CAT28LV65G-25T Datasheet(PDF) 8 Page - Catalyst Semiconductor |
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CAT28LV65G-25T Datasheet(HTML) 8 Page - Catalyst Semiconductor |
8 / 12 page CAT28LV65 8 Doc. No. 1024, Rev. D WE CE OE I/O6 tOEH tOE tOES tWC (1) (1) ADDRESS CE WE OE I/O7 DIN = X DOUT = X DOUT = X tOE tOEH tWC tOES DATA DATA DATA DATA DATA Polling DATA polling is provided to indicate the completion of write cycle. Once a byte write or page write cycle is initiated, attempting to read the last byte written will output the complement of that data on I/O7 (I/O0–I/O6 are indeterminate) until the programming cycle is com- plete. Upon completion of the self-timed write cycle, all I/O’s will output true data during a read cycle. Toggle Bit In addition to the DATA Polling feature, the device offers an additional method for determining the completion of a write cycle. While a write cycle is in progress, reading data from the device will result in I/O6 toggling between one and zero. However, once the write is complete, I/O6 stops toggling and valid data can be read from the device. Ready/ BUSY BUSY BUSY BUSY BUSY (RDY/BUSY BUSY BUSY BUSY BUSY) The RDY/ BUSY pin is an open drain output which indicates device status during programming. It is pulled low during the write cycle and released at the end of programming. Several devices may be OR-tied to the same RDY/ BUSY line. Figure 7. DATA Polling 28LV65 F11 Figure 8. Toggle Bit Note: (1) Beginning and ending state of I/O6 is indeterminate. |
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