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CAT9954AWI-G-T2 Datasheet(PDF) 11 Page - Catalyst Semiconductor |
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CAT9954AWI-G-T2 Datasheet(HTML) 11 Page - Catalyst Semiconductor |
11 / 16 page CAT9554, CAT9554A 11 Doc. No. 25088, Rev. B © 2006 by Catalyst Semiconductor, Inc. Characteristics subject to change without notice Figure 11. Read from Register Figure 12. Read Input Port Register Power-On Reset Operation When the power supply is applied to VCC pin, an internal power-on reset pulse holds the CAT9554/9554A in a reset state until VCC reaches VPOR level. At this point, the reset condition is released and the internal state ma- chine and the CAT9554/9554A registers are initialized to their default state. DATA S0 1 0 0 A2 A0 0 A A1 0 1 0 0 A2 A1 A0 A DATA A acknowledge from master acknowledge from slave R/W slave address slave address data from register COMMAND BYTE A S 1 acknowledge from slave acknowledge from slave R/W At this moment master-transmitter becomes master-receiver and slave-receiver becomes slave-transmitter NA no acknowledge from master data from register P last byte first byte 12 34 5 6 7 8 9 SCL SDA READ FROM PORT DATA INTO PORT S 0100 A2 A0 1 A A1 A DATA 4 NA P no acknowledge from master acknowledge from master acknowledge from slave R/W slave address data from port start condition stop condition DATA 2 tPS tPH DATA 3 DATA 4 DATA 1 data from port tIV tIR INT DATA 1 |
Similar Part No. - CAT9954AWI-G-T2 |
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