ZL50073_06 datasheet(2/68 Pages) ZARLINK

Part #	ZL50073

Description	32 K Channel Digital Switch with High Jitter Tolerance, Rate Conversion per Group of 4 Streams (8, 16, 32 or 64 Mbps), and 128 Inputs and 128 Outputs

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Manufacturer	ZARLINK [Zarlink Semiconductor Inc]

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ZL50073

Data Sheet

2

Zarlink Semiconductor Inc.

Applications

• Large Switching Platforms

• Central Office Switches

• Wireless Base Stations

• Multi-service Access Platforms

• Media Gateways

Description

The ZL50073 is a non-blocking Time Division Multiplex (TDM) switch with maximum 32,768 x 32,768 channels. The

device can switch 64 kbps and Nx64 kbps TDM channels from any input stream to any output stream. With a

number of enhanced features, the ZL50073 is designed for high capacity voice and data switching applications.

The ZL50073 has 128 input and 128 output data streams which can operate at 8.192 Mbps, 16.384 Mbps,

32.768 Mbps or 65.536 Mbps. The large number of inputs and outputs maintains full 32 K x 32 K channel switching

capacity at bit rates of 65 Mbps, 32 Mbps and 16 Mbps. Up to 32 input and output data streams may operate at

65 Mbps. Up to 64 input and output data streams may operate at 32 Mbps. Up to 128 input and output data streams

may operate at 16 Mbps or 8 Mbps. The data rate can be independently set in groups of 4 input or output streams.

In this way it is possible to provide rate conversion from input data channel to output data channel.

The ZL50073 uses a master clock (CKi0) and frame pulse (FPi0) to define the TDM data stream frame boundary

and timing. A high speed system clock is derived internally from CKi0 and FPi0. The input and output data streams

can independently reference their timings to one of the input clocks or to the internal system clock.

The ZL50073 has a variety of user configurable options designed to provide flexibility when data streams are

connected to multiple TDM components or circuits. These include:

• Two additional programmable reference inputs, CKi2 - 1 and FPi2 - 1, which can be used to provide

alternative sources for input and output stream timing

• Variable input bit delay and output advancement, to accommodate delays and frame offsets of streams

connected through different data paths

• Four timing outputs, CKo3 - 0 and FPo3 - 0, which can be configured independently to provide a variety of

clock and frame pulse options

• Support of both ST-BUS and GCI-Bus formats

The ZL50073 also has a number of value added features for voice and data applications:

• Per-channel variable delay mode for low latency applications and constant delay mode for frame integrity

applications

• Per-channel A-Law/

µ-Law Conversions for both voice and data

• 128 separate Pseudo-random Bit Sequence (PRBS) test circuits; one per stream. This provides an integrated

Bit Error Rate (BER) test capability to facilitate data path integrity checking

The ZL50073 has two major modes of operation: Connection Mode (normal) and Message Mode. In Connection

Mode, data bytes received at the TDM inputs are switched to timeslots in the output data streams, with mapping

controlled by the Connection Memories. Using Zarlink's Message Mode capability, microprocessor data can be

broadcast to the output data streams on a per-channel basis. This feature is useful for transferring control and

status information to external circuits or other TDM devices.

A non-multiplexed microprocessor port provides access to the internal Data Memory, Connection Memory and

Control Registers used to program ZL50073 options. The port is configurable to interface with either Motorola or

Intel-type microprocessors and is selectable to be either 32 bit or 16 bit.

The mandatory requirements of IEEE 1149.1 standard are supported via the dedicated Test Access Port.

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