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MUN5115DW1T1G Datasheet(PDF) 1 Page - ON Semiconductor |
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MUN5115DW1T1G Datasheet(HTML) 1 Page - ON Semiconductor |
1 / 20 page © Semiconductor Components Industries, LLC, 2005 September, 2005 − Rev. 6 1 Publication Order Number: MUN5111DW1T1/D MUN5111DW1T1 Series Preferred Devices Dual Bias Resistor Transistors PNP Silicon Surface Mount Transistors with Monolithic Bias Resistor Network The BRT (Bias Resistor Transistor) contains a single transistor with a monolithic bias network consisting of two resistors; a series base resistor and a base−emitter resistor. These digital transistors are designed to replace a single device and its external resistor bias network. The BRT eliminates these individual components by integrating them into a single device. In the MUN5111DW1T1 series, two BRT devices are housed in the SOT−363 package which is ideal for low−power surface mount applications where board space is at a premium. Features • Simplifies Circuit Design • Reduces Board Space • Reduces Component Count • Pb−Free Packages are Available MAXIMUM RATINGS (TA = 25°C unless otherwise noted, common for Q1 and Q2) Rating Symbol Value Unit Collector-Base Voltage VCBO −50 Vdc Collector-Emitter Voltage VCEO −50 Vdc Collector Current IC −100 mAdc THERMAL CHARACTERISTICS Characteristic (One Junction Heated) Symbol Max Unit Total Device Dissipation TA = 25°C Derate above 25 °C PD 187 (Note 1) 256 (Note 2) 1.5 (Note 1) 2.0 (Note 2) mW mW/ °C Thermal Resistance, Junction-to-Ambient RqJA 670 (Note 1) 490 (Note 2) °C/W Characteristic (Both Junctions Heated) Symbol Max Unit Total Device Dissipation TA = 25°C Derate above 25 °C PD 250 (Note 1) 385 (Note 2) 2.0 (Note 1) 3.0 (Note 2) mW mW/ °C Thermal Resistance, Junction-to-Ambient RqJA 493 (Note 1) 325 (Note 2) °C/W Thermal Resistance, Junction-to-Lead RqJL 188 (Note 1) 208 (Note 2) °C/W Junction and Storage Temperature Range TJ, Tstg −55 to +150 °C Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. 1. FR−4 @ Minimum Pad 2. FR−4 @ 1.0 x 1.0 inch Pad Preferred devices are recommended choices for future use and best overall value. DEVICE MARKING INFORMATION See specific marking information in the device marking table on page 2 of this data sheet. Q1 R1 R2 R2 R1 Q2 (1) (2) (3) (4) (5) (6) http://onsemi.com SOT−363 CASE 419B STYLE 1 MARKING DIAGRAM 1 1 6 See detailed ordering and shipping information in the table on page 2 of this data sheet. ORDERING INFORMATION xx = Device Code (Refer to page 2) M = Date Code G = Pb−Free Package (Note: Microdot may be in either location) xx M G G |
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