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NB7L14MMNR2G Datasheet(PDF) 9 Page - ON Semiconductor |
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NB7L14MMNR2G Datasheet(HTML) 9 Page - ON Semiconductor |
9 / 11 page NB7L14M http://onsemi.com 9 Application Information All NB7L14M inputs can accept PECL, CML, LVTTL, LVCMOS and LVDS signal levels. The limitations for differential input signal (LVDS, PECL, or CML) are minimum input swing of 75 mV and the maximum input swing of 2500 mV. Within these conditions, the input voltage can range from VCC to 1.2 V. Examples interfaces are illustrated below in a 50 W environment (Z = 50 W). 50 W VCC CLK CLK 50 W NB7L14M VCC VTCLK VEE VCC Q 50 W 50 W CML Driver VEE Figure 15. CML to CML Interface Z Q Z Figure 16. PECL to CML Receiver Interface 50 W Z Z VCC VCC PECL Driver CLK CLK 50 W NB7L14M VEE VBias VTCLK VEE RT RT VEE VCC RT 5.0 V 290 W 3.3 V 150 W 2.5 V 80 W Recommended RT Values 50 W 50 W VTCLK VCC VTCLK VBias |
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