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NB7L14MMNR2G Datasheet(PDF) 2 Page - ON Semiconductor |
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NB7L14MMNR2G Datasheet(HTML) 2 Page - ON Semiconductor |
2 / 11 page NB7L14M http://onsemi.com 2 VEE Q3 Q3 VCC VEE Q0 Q0 VCC Q1 Q1 Q2 Q2 VTCLK CLK CLK VTCLK 56 7 8 16 15 14 13 12 11 10 9 1 2 3 4 NB7L14M Exposed Pad (EP) Figure 2. QFN−16 Pinout (Top View) Table 1. PIN DESCRIPTION Pin Name I/O Description 1 VTCLK − Internal 50 W Termination Pin for CLK. 2 CLK LVPECL, CML, LVCMOS, LVTTL, LVDS Inverted Differential Clock/Data Input. (Note 1) 3 CLK LVPECL, CML, LVCMOS, LVTTL, LVDS Non−inverted Differential Clock/Data Input. (Note 1) 4 VTCLK − Internal 50 W Termination Pin for CLK. 5,16 VEE Power Supply Negative Supply Voltage. All VEE pins must be externally connected to a Power Supply to guarantee proper operation. 6 Q3 CML Output Inverted Differential Output 3 with Internal 50 W Source Termination Resistor. (Note 2) 7 Q3 CML Output Non−inverted Differential Output 3 with Internal 50 W Source Termination Resistor. (Note 2) 8,13 VCC Power Supply Positive Supply Voltage. All VCC pins must be externally connected to a Power Supply to guarantee proper operation. 9 Q2 CML Output Inverted Differential Output 2 with Internal 50 W Source Termination Resistor. (Note 2) 10 Q2 CML Output Non−inverted Differential Output 2 with Internal 50 W Source Termination Resistor. (Note 2) 11 Q1 CML Output Inverted Differential Output 1 with Internal 50 W Source Termination Resistor. (Note 2) 12 Q1 CML Output Non−inverted Differential Output 1 with Internal 50 W Source Termination Resistor. (Note 2) 14 Q0 CML Output Inverted Differential Output 0 with Internal 50 W Source Termination Resistor. (Note 2) 15 Q0 CML Output Non−inverted Differential Output 0 with Internal 50 W Source Termination Resistor. (Note 2) − EP − Exposed Pad. Thermal pad on the package bottom must be attached to a heatsinking conduit to improve heat transfer. It is recommended to connect the EP to the lower potential (VEE). 1. In the differential configuration when the input termination pins (VTCLK, VTCLK) are connected to a common termination voltage or left open, and if no signal is applied on CLK and CLK, then the device will be susceptible to self−oscillation. 2. CML outputs require 50 W receiver termination resistors to VCC for proper operation. |
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