NB7L216MNG datasheet(1/12 Pages) ONSEMI

Part #	NB7L216MNG

Description	2.5V/3.3V, 12Gb/s Multi Level Clock/Data Input to RSECL, High Gain Receiver/Buffer/Translator with Internal Termination

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Manufacturer	ONSEMI [ON Semiconductor]

Direct Link	http://www.onsemi.com

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August, 2006 − Rev. 2

1

Publication Order Number:

NB7L216/D

NB7L216

2.5V/3.3V, 12Gb/s Multi

Level Clock/Data Input to

RSECL, High Gain

Receiver/Buffer/Translator

with Internal Termination

Description

The NB7L216 is a differential receiver/driver with high gain output

targeted for high frequency applications. The device is functionally

equivalent to the NBSG16 but with much higher gain output. This

highly versatile device provides 35 dB of gain up to 7 GHz.

Inputs incorporate internal 50

W termination resistors and accept

Negative ECL (NECL), Positive ECL (PECL), LVTTL, LVCMOS,

CML, or LVDS. Outputs are Reduced Swing ECL (RSECL), 400 mV.

The VBB pin is an internally generated voltage supply available to

this device only. VBB is used as a reference voltage for single−ended

NECL or PECL inputs. For all single−ended input conditions, the

unused complementary differential input should be connected to VBB

as a switching reference voltage. VBB may also rebias AC coupled

inputs. When used, decouple VBB via a 0.01 mF capacitor and limit

current sourcing or sinking to 0.5 mA. When not used, VBB output

should be left open.

Application notes, models and support documentation are available

at www.onsemi.com.

Features

• High Gain of 35 dB from DC to 7 GHz Typical

• High IIP3: 0 dBm Typical

• 20 mV Minimum Input Voltage Swing

• Maximum Input Clock Frequency up to 8.5 GHz

• Maximum Input Data Rate up to 12 Gb/s Typical

• <0.5 ps of RMS Clock Jitter

• <9 ps of Data Dependent Jitter

• 120 ps Typical Propagation Delay

• 30 ps Typical Rise and Fall Times

• RSPECL Output with Operating Range: VCC = 2.375 V to 3.465 V

with VEE = 0 V

• RSNECL Output with RSNECL or NECL Inputs with Operating

Range: VCC = 0 V with VEE = −2.375 V to −3.465 V

• RSECL Output Level (400 mV Peak−to−Peak Output),

• 50 W Internal Input Termination Resistors (Temperature−Coefficient

of < 6.38 m

W/°C)

• VBB – ECL Reference Voltage Output

• Pb−Free Packages are Available

50

W

50

W

VTD

D

VTD

Q

QFN−16

MN SUFFIX

CASE 485G

MARKING DIAGRAM*

*For additional marking information, refer to

Application Note AND8002/D.

A

= Assembly Location

L

= Wafer Lot

Y

= Year

W

= Work Week

G

= Pb−Free Package

See detailed ordering and shipping information in the package

dimensions section on page 11 of this data sheet.

ORDERING INFORMATION

16

NB7L

216

ALYW

G

1

Figure 1. Functional Block Diagram

TIME (17 ps/div)

Figure 2. Typical Output Waveform at

12 Gb/s with PRBS 223−1 (VINPP = 400 mV,

Input Signal DDJ = 12 ps)

http://onsemi.com

Device DDJ = 3 ps

(Note: Microdot may be in either location)

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