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NB100ELT23LDTR2G Datasheet(PDF) 1 Page - ON Semiconductor |
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NB100ELT23LDTR2G Datasheet(HTML) 1 Page - ON Semiconductor |
1 / 8 page © Semiconductor Components Industries, LLC, 2007 March, 2007 − Rev. 8 1 Publication Order Number: NB100ELT23L/D NB100ELT23L 3.3VDual Differential LVPECL/LVDS to LVTTL Translator The NB100ELT23L is a dual differential LVPECL/LVDS to LVTTL translator. Because LVPECL (Positive ECL) or LVDS levels are used, only +3.3 V and ground are required. The small outline 8-lead package and the dual gate design of the ELT23L makes it ideal for applications which require the translation of a clock and a data signal. The ELT23L is available in only the ECL 100K standard. Since there are no LVPECL outputs or an external VBB reference, the ELT23L does not require both ECL standard versions. The LVPECL inputs are differential. Therefore, the NB100ELT23L can accept any standard differential LVPECL/LVDS input referenced from a VCC of +3.3 V. Features • 2.1 ns Typical Propagation Delay • Maximum Operating Frequency > 160 MHz • 24 mA LVTTL Outputs • Operating Range: VCC = 3.0 V to 3.6 V with GND = 0 V • Pb−Free Packages are Available *For additional marking information, refer to Application Note AND8002/D. MARKING DIAGRAMS* A = Assembly Location L = Wafer Lot Y = Year W = Work Week M = Date Code G = Pb−Free Package K23L ALYW G G SOIC−8 D SUFFIX CASE 751 1 8 TSSOP−8 DT SUFFIX CASE 948R 1 8 1 8 http://onsemi.com KT23L ALYW G 1 8 DFN8 MN SUFFIX CASE 506AA 14 See detailed ordering and shipping information in the package dimensions section on page 5 of this data sheet. ORDERING INFORMATION (Note: Microdot may be in either location) |
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