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WM8152 Datasheet(PDF) 11 Page - Wolfson Microelectronics plc |
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WM8152 Datasheet(HTML) 11 Page - Wolfson Microelectronics plc |
11 / 28 page Production Data WM8152 w PD Rev 4.2 April 2007 11 Figure 6 Typical Power up Sequence where DVDD1 is Powered before AVDD Figure 6 shows a typical power-up sequence where DVDD1 is powered up first. It is assumed that DVDD1 is already up to specified operating voltage. When AVDD goes above the minimum threshold, Vpora, there is enough voltage for the circuit to guarantee PORB is asserted low and the chip is held in reset. In this condition, all writes to the control interface are ignored. When AVDD rises to Vpora_on, PORB is released high and all registers are in their default state and writes to the control interface may take place. On power down, where DVDD1 falls first, PORB is asserted low whenever DVDD1 drops below the minimum threshold Vpord_off. SYMBOL TYP UNIT Vpora 0.6 V Vpora_on 1.2 V Vpora_off 0.6 V Vpord_on 0.7 V Vpord_off 0.6 V Table 1 Typical POR Operation (typical values, not tested) Note: It is recommended that every time power is cycled to the WM8199 a software reset is written to the software register to ensure that the contents of the control registers are at their default values before carrying out any other register writes. |
Similar Part No. - WM8152_07 |
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Similar Description - WM8152_07 |
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