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AD1994ACPZRL Datasheet(PDF) 6 Page - Analog Devices |
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AD1994ACPZRL Datasheet(HTML) 6 Page - Analog Devices |
6 / 24 page AD1994 Rev. 0 | Page 6 of 24 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS PIN 1 INDICATOR 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 PGND1 PGND1 PGND1 OUTL+ OUTL+ OUTL+ PVDD1 PVDD1 PVDD1 PVDD1 OUTL– OUTL– OUTL– PGND1 PGND1 PGND1 NC = NO CONNECT PGND2 PGND2 PGND2 OUTR+ OUTR+ OUTR+ PVDD2 PVDD2 PVDD2 PVDD2 OUTR– OUTR– OUTR– PGND2 PGND2 PGND2 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 AD1994 TOP VIEW (Not to Scale) Figure 3. Pin Configuration Table 9. Pin Function Descriptions Pin No. Mnemonic In/Out Description 1, 2, 3 PGND1 Negative Power Supply. Used for the A2 and B2 high power transistors. 4, 5, 6 OUTL+ O Output of Transistor Pair A1 and A2. 7, 8, 9, 10 PVDD1 Positive Power Supply. Used for the A1 and B1 high power transistors. 11, 12, 13 OUTL− O Output of Transistor Pair B1 and B2. 14, 15, 16 PGND1 Negative Power Supply. Used for the A2 and B2 high power transistors. 17 ERR2 O Active Low Thermal Shutdown. 18 ERR1 O Active Low Thermal Warning Error Output. 19 MODL/ERR0 O Active Low Overcurrent Error Output/Modulator Output Left. 20 MODR/DCTRL2 I/O Nonoverlap Time Setting MSB/Modulator Output Right. 21 DCTRL1 I Nonoverlap Time Setting. 22 DCTRL0 I Nonoverlap Time Setting LSB. 23, 26 DGND Negative Power Supply for Low Power Digital Circuitry. 24, 25 DVDD Positive Power Supply for Low Power Digital Circuitry. 27 CLKI I Clock Input for 256 × fS Audio Modulator Clock. 28 CLKO O Inverted Version of CLKI for Use with an External XTAL Oscillator. 29 MUTE I Active Low Mute Input. 30 RESET I Active Low Reset Input. 31 PGA1 I PGA Gain Control MSB. 32 PGA0 I PGA Gain Control LSB. 33, 34, 35 PGND2 Negative Power Supply for High Power Transistors C2 and D2. 36, 37, 38 OUTR− O Output of Transistor Pair D1 and D2. 39, 40, 41, 42 PVDD2 Positive Power Supply for High Power Transistors C1 and D1. 43, 44, 45 OUTR+ O Output of Transistor Pair C1 and C2. 46, 47, 48 PGND2 Negative Power Supply for High Power Transistors C2 and D2. 49 MOD_EN I Modulator Mode Enable Pin when Pulled to Logic High. |
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