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MCIMX31 Datasheet(PDF) 6 Page - Freescale Semiconductor, Inc |
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MCIMX31 Datasheet(HTML) 6 Page - Freescale Semiconductor, Inc |
6 / 108 page i.MX31/i.MX31L Advance Information, Rev. 2.3 6 Freescale Semiconductor Functional Description and Application Information 2.2 Module Inventory Table 3 shows an alphabetical listing of the modules in the multimedia applications processor. For extended descriptions of the modules, see the reference manual. A cross-reference is provided to the electrical specifications and timing information for each module with external signal connections. Table 3. Digital and Analog Modules Block Mnemonic Block Name Functional Grouping Brief Description Section/ Page 1-Wire® 1-Wire Interface Connectivity Peripheral The 1-Wire module provides bi-directional communication between the ARM11 core and external 1-Wire devices. 4.3.4/19 ATA Advanced Technology (AT) Attachment Connectivity Peripheral The ATA block is an AT attachment host interface. It is designed to interface with IDE hard disc drives and ATAPI optical disc drives. 4.3.5/21 AUDMUX Digital Audio Multiplexer Multimedia Peripheral The AUDMUX interconnections allow multiple, simultaneous audio/voice/data flows between the ports in point-to-point or point-to-multipoint configurations. 4.3.6/29 CAMP Clock Amplifier Module Clock The CAMP converts a square wave/sinusoidal input into a rail-to-rail square wave. The output of CAMP feeds the predivider. 4.3.3/19 CCM Clock Control Module Clock The CCM provides clock, reset, and power management control for the i.MX31 and i.MX31L. – CSPI Configurable Serial Peripheral Interface (x 3) Connectivity Peripheral The CSPI is equipped with data FIFOs and is a master/slave configurable serial peripheral interface module, capable of interfacing to both SPI master and slave devices. 4.3.7/29 DPLL Digital Phase Lock Loop Clock The DPLLs produce high-frequency on-chip clocks with low frequency and phase jitters. Note: External clock sources provide the reference frequencies. 4.3.8/31 ECT Embedded Cross Trigger Debug The ECT is composed of three CTIs (Cross Trigger Interface) and one CTM (Cross Trigger Matrix—key in the multi-core and multi-peripheral debug strategy. – EMI External Memory Interface Memory Interface (EMI) The EMI includes • Multi-Master Memory Interface (M3IF) • Enhanced SDRAM Controller (ESDCTL) • NAND Flash Controller (NFC) • Wireless External Interface Module (WEIM) – 4.3.9.3/39, 4.3.9.1/32, 4.3.9.2/34 EPIT Enhanced Periodic Interrupt Timer Timer Peripheral The EPIT is a 32-bit “set and forget” timer which starts counting after the EPIT is enabled by software. It is capable of providing precise interrupts at regular intervals with minimal processor intervention. – ETM Embedded Trace Macrocell Debug/Trace The ETM (from ARM, Ltd.) supports real-time instruction and data tracing by way of ETM auxiliary I/O port. 4.3.10/47 FIR Fast InfraRed Interface Connectivity Peripheral This FIR is capable of establishing a 0.576 Mbit/s, 1.152 Mbit/s or 4 Mbit/s half duplex link via a LED and IR detector. It supports 0.576 Mbit/s, 1.152 Mbit/s medium infrared (MIR) physical layer protocol and 4Mbit/s fast infrared (FIR) physical layer protocol defined by IrDA, version 1.4. 4.3.11/48 |
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