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ATMEGA103-6AI Datasheet(PDF) 5 Page - ATMEL Corporation |
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ATMEGA103-6AI Datasheet(HTML) 5 Page - ATMEL Corporation |
5 / 141 page 5 ATmega103(L) 0945I–AVR–02/07 Pin Descriptions VCC Supply voltage. GND Ground. Port A (PA7..PA0) Port A is an 8-bit bi-directional I/O port. Port pins can provide internal pull-up resistors (selected for each bit). The Port A output buffers can sink 20 mA and can drive LED dis- plays directly. When pins PA0 to PA7 are used as inputs and are externally pulled low, they will source current if the internal pull-up resistors are activated. Port A serves as Multiplexed Address/Data bus when using external SRAM. The Port A pins are tri-stated when a reset condition becomes active, even if the clock is not running. Port B (PB7..PB0) Port B is an 8-bit bi-directional I/O port with internal pull-up resistors. The Port B output buffers can sink 20 mA. As inputs, Port B pins that are externally pulled low, will source current if the pull-up resistors are activated. Port B also serves the functions of various special features. The Port B pins are tri-stated when a reset condition becomes active, even if the clock is not running. Port C (PC7..PC0) Port C is an 8-bit output port. The Port C output buffers can sink 20 mA. Port C also serves as Address output when using external SRAM. Since Port C is an output only port, the Port C pins are not tri-stated when a reset condi- tion becomes active. Port D (PD7..PD0) Port D is an 8-bit bi-directional I/O port with internal pull-up resistors. The Port D output buffers can sink 20 mA. As inputs, Port D pins that are externally pulled low will source current if the pull-up resistors are activated. Port D also serves the functions of various special features. The Port D pins are tri-stated when a reset condition becomes active, even if the clock is not running. Port E (PE7..PE0) Port E is an 8-bit bi-directional I/O port with internal pull-up resistors. The Port E output buffers can sink 20 mA. As inputs, Port E pins that are externally pulled low will source current if the pull-up resistors are activated. Port E also serves the functions of various special features. The Port E pins are tri-stated when a reset condition becomes active, even if the clock is not running Port F (PF7..PF0) Port F is an 8-bit input port. Port F also serves as the analog inputs for the ADC. RESET Reset input. An external reset is generated by a low level on the RESET pin. Reset pulses longer than 50 ns will generate a reset, even if the clock is not running. Shorter pulses are not guaranteed to generate a reset. XTAL1 Input to the inverting Oscillator amplifier and input to the internal clock operating circuit. XTAL2 Output from the inverting Oscillator amplifier. |
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