1

Features

– Software Procedure to Verify Write Protect Status

– Endurance: 1 Million Write Cycles

– Data Retention: 100 Years

Packages

Description

The AT34C02 provides 2048 bits of serial electrically-erasable and programmable

read only memory (EEPROM) organized as 256 words of 8 bits each. The first-half of

the device incorporates a software write protection feature while hardware write pro-

tection for the entire array is available via an external pin as well. Once the software

write protection is enabled, by sending a special command to the device, it cannot be

reversed. The hardware write protection is controlled with the WP pin and can be used

to protect the entire array, whether or not the software write protection has been

enabled. This allows the user to protect none, first-half, or all of the array depending

on the application. The device is optimized for use in many industrial and commercial

applications where low-power and low-voltage operations are essential. The AT34C02

is available in space saving 8-lead PDIP, 8-lead JEDEC SOIC, 8-lead MAP, 8-lead

TSSOP and 8-ball dBGA2 packages and is accessed via a two-wire serial interface. In

addition, it is available in 1.8V (1.8V to 5.5V) versions.

Table 1. Pin Configurations

Pin Name

Function

A0 - A2

Address Inputs

SDA

Serial Data

SCL

Serial Clock Input

WP

Write Protect

Two-wire Serial

EEPROM

with Permanent

Software Write

Protect

2K (256 x 8)

AT34C02

Note: Not recommended for new

design; please refer to

AT34CO2C datasheet.

Rev. 0958Q–SEEPR–1/07

8-lead PDIP

1

2

3

4

8

7

6

5

A0

A1

A2

GND

VCC

WP

SCL

SDA

8-lead SOIC

1

2

3

4

8

7

6

5

A0

A1

A2

GND

VCC

WP

SCL

SDA

8-lead TSSOP

1

2

3

4

8

7

6

5

A0

A1

A2

GND

VCC

WP

SCL

SDA

8-lead MAP

Bottom View

1

2

3

4

8

7

6

5

A0

A1

A2

GND

VCC

WP

SCL

SDA

8-ball dBGA2

VCC

WP

SCL

SDA

A0

A1

A2

GND

1

2

3

4

8

7

6

5

Bottom View