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BCM5321M Datasheet(PDF) 2 Page - Broadcom Corporation. |
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BCM5321M Datasheet(HTML) 2 Page - Broadcom Corporation. |
2 / 2 page O V ERVI EW ® Phone: 949-450-8700 Fax: 949-450-8710 E-mail: info@broadcom.com Web: www.broadcom.com BROADCOM CORPORATION 16215 Alton Parkway, P.O. Box 57013 Irvine, California 92619-7013 © 2006 by BROADCOM CORPORATION. All rights reserved. 5324M-PB01-R 04/07/06 Broadcom®, the pulse logo, Connecting everything®, and the Connecting everything logo are among the trademarks of Broadcom Corporation and/or its affiliates in the United States, certain other countries and/or the EU. Any other trademarks or trade names mentioned are the property of their respective owners. BCM5324M Block Diagram BCM5324M is designed based on the field-proven industry leader ROBOSwitch™. This device combines all the functions of a high-speed switch system including packet buffers, PHY transceivers, media access controllers, address management, and a non-blocking switch fabric into a single 0.13 μm CMOS device. It complies with IEEE 802.3 specifications, including the MAC control PAUSE frame and auto- negotiation subsections, providing interoperability with all industry- standard Ethernet, Fast Ethernet and Gigabit Ethernet devices. BCM5324M is the industry first Ethernet to integrate twenty-four full- duplex 10BASE-T/100BASE-TX/FX Fast Ethernet transceivers. Each transceiver incorporates the Broadcom PHY Advance Cable Diagnostic technology, which can detect cable shorts as well as open and measure the cable length. BCM5324M also supports two GMII/RGMII/TBI interfaces, providing flexible 10/100/1000BASE-TX and fiber connectivity. BCM5324M supports 8K MAC addresses, 4K VLAN addresses and stores up to 256 multicast addresses including IP multicast. BCM5324M also supports 802.1d Spanning Tree, 802.1s Multiple STP, 802.1w Rapid STP, and flexible ingress and egress checking rules for VLAN processing. BCM5324M supports up to four CoS queues per egress port, ideal for delay sensitive multimedia applications. Traffic can be assigned to these CoS queues based on the Port ID, the MAC address, the 802.1p priority field in layer 2, the TOS field in IPv4 or the DiffServ field in IPv6 headers. Together with other advanced features, such as 802.1x EAPOL protocol filtering, Port bandwidth/rate control, MAC address locking and IGMP snooping at Layer2 and Layer3 allow system vendors to build advanced L2+ switch systems for the multitenant/multidweller unit (MDU/MTU) markets. The BCM5324M family of switches is optimized for WebSmart and L2 managed designs. The new level of integration brings L2 manageable to SMB switches at an affordable price. Single chip replaces the typical 3- or 4 chip solutions in the market today. For Network Management, the BCM5324M includes 70+ on-chip MIB counters to collect receive and transmit statistics from each port for supporting the Etherlike MIB, Bridge MIB, MIB II (interfaces) and the RMON MIB (Groups 1, 2, 3, 9). Product ordering information: • BCM5324M (24FE+2G) • BCM5322M (24FE+2MII) • BCM5321M (16FE+2G) • BCM5320M (8FE+2G) GMII / RGMII / TBI GMII / RGMII / TBI MII / RvMII Interface CPU Interface Auto MDI / MDIX Auto MDI / MDIX Auto MDI / MDIX Auto MDI / MDIX LEDs QoS Traffic Aggregation Port Trunking Secure MAC Storm Control 3 Mb Shared Buffer Interface IGMP Snooping 4K VLAN Table MIB Counters 8K L2 MAC Table Rate Control Internal Osc. Circuit 10/100 PHY 0 10/100 PHY 1 10/100 PHY 2 10/100 PHY 23 SPI / CPU Interface MAC LED Interface MAC MAC MAC MAC GMAC GMAC BCM5461 BCM5461 |
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