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T89C51RC2-SLSCM Datasheet(PDF) 9 Page - ATMEL Corporation |
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T89C51RC2-SLSCM Datasheet(HTML) 9 Page - ATMEL Corporation |
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9 / 117 page  9 T89C51RB2/RC2 4105D–8051–10/06 Oscillator In order to optimize the power consumption and execution time needed for a specific task, an internal, prescaler feature has been implemented between oscillator and the CPU and peripherals. Registers Table 4. CKRL Register CKRL – Clock Reload Register (97h) Reset Value = 1111 1111b Not bit addressable Table 5. PCON Register PCON – Power Control Register (87h) Reset Value = 00X1 0000b Not bit addressable 765 4 3 2 1 0 --- - --- - Bit Number Mnemonic Description 7:0 CKRL Clock Reload Register: Prescaler value 76 54 32 1 0 SMOD1 SMOD0 - POF GF1 GF0 PD IDL Bit Number Bit Mnemonic Description 7SMOD1 Serial port Mode bit 1 Set to select double baud rate in mode 1, 2 or 3. 6SMOD0 Serial port Mode bit 0 Cleared to select SM0 bit in SCON register. Set to select FE bit in SCON register. 5- Reserved The value read from this bit is indeterminate. Do not set this bit. 4POF Power-Off Flag Cleared to recognize next reset type. Set by hardware when VCC rises from 0 to its nominal voltage. Can also be set by software. 3GF1 General Purpose Flag Cleared by software for general purpose usage. Set by software for general purpose usage. 2GF0 General Purpose Flag Cleared by software for general purpose usage. Set by software for general purpose usage. 1PD Power-Down mode bit Cleared by hardware when reset occurs. Set to enter power-down mode. 0IDL Idle mode bit Cleared by hardware when interrupt or reset occurs. Set to enter idle mode. |
Similar Part No. - T89C51RC2-SLSCM |
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Similar Description - T89C51RC2-SLSCM |
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