NLSF1174MNR2 datasheet(1/6 Pages) ONSEMI

Part #	NLSF1174MNR2

Description	Hex D Flip?묯lop with Common Clock and Reset

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Manufacturer	ONSEMI [ON Semiconductor]

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May, 2006 − Rev. 5

1

Publication Order Number:

NLSF1174/D

NLSF1174

Hex D Flip−Flop with

Common Clock and Reset

This device consists of six D flip−flops with common Clock and

Reset inputs. Each flip−flop is loaded with a low−to−high transition of

the Clock input. Reset is asynchronous and active low. All

inputs/outputs are standard CMOS compatible.

Features

• Output Drive Compatibility: 10 LSTTL Loads

• Outputs Directly Interface to CMOS

• Operating Voltage Range: 2.0 to 6.0 V

• Low Input Current: 1.0 mA

• MSL Level 1

• Chip Complexity: 162 FET

• Pb−Free Package is Available*

1

2

3

4

Q5

VCC

16

15

14

13

56

7

8

9

10

11

12

D3

D5

D4

Q2

Q0

D0

Reset

Q3

Clock

GND

Q4

D2

Q1

D1

Figure 1. PIN ASSIGNMENT (Top View)

Center pad on bottom may be connected to VCC of device.

This pad must be isolated or connected to VCC.

*For additional information on our Pb−Free strategy and soldering details, please

download the ON Semiconductor Soldering and Mounting Techniques

Reference Manual, SOLDERRM/D.

http://onsemi.com

Inputs

Output

Reset

Clock

D

Q

FUNCTION TABLE

L

H

L

XX

No Change

H

L

X

L

H

L

Device

Package

Shipping†

ORDERING INFORMATION

NLSF1174MNR2

QFN−16

3000 / Tape & Reel

†For information on tape and reel specifications,

including part orientation and tape sizes, please

refer to our Tape and Reel Packaging Specifications

Brochure, BRD8011/D.

NLSF1174MNR2G

QFN−16

(Pb−Free)

3000 / Tape & Reel

NLSF1174 = Device Code

A

= Assembly Location

L

= Wafer Lot

Y

= Year

W

= Work Week

G

= Pb−Free Package

(Note: Microdot may be in either location)

MARKING DIAGRAM

QFN−16

MN SUFFIX

CASE 485G

16

NLSF

1174

ALYW

G

1

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