SG3525A

http://onsemi.com

2

Figure 1. Representative Block Diagram

NOR

NOR

16

15

12

4

3

6

5

7

9

1

2

8

10

Reference

Regulator

Under−

Voltage

Lockout

Oscillator

Latch

F/F

Q

Q

− PWM

Error

Amp

+

−

+

−

To Internal

Circuitry

Ground

OSC Output

Sync

RT

CT

Discharge

Compensation

INV. Input

Noninv. Input

Shutdown

5.0k

S

R

S

50

mA

VC

13

Output A

11

14

Output B

SG3525A Output Stage

5.0k

ORDERING INFORMATION

Device

Package

SG3525AN

PDIP−16

25 Units / Rail

SG3525ANG

PDIP−16

(Pb−Free)

25 Units / Rail

SG3525ADW

SOIC−16L

47 Units / Rail

SG3525ADWG

SOIC−16L

(Pb−Free)

47 Units / Rail

SG3525ADWR2

SOIC−16L

1000 Tape & Reel

SG3525ADWR2G

SOIC−16L

(Pb−Free)

1000 Tape & Reel

†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging

Specifications Brochure, BRD8011/D.