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SY10E116

SY100E116

Micrel, Inc.

M9999-032006

hbwhelp@micrel.com or (408) 955-1690

FEATURES

s 450ps max. Propagation Delay

s Fully compatible with industry standard 10KH,

100K I/O levels

s Internal 75K

s Fully compatible with Motorola MC10E/100E116

s Available in 28-pin PLCC package

DESCRIPTION

The SY10/100E116 are quint differential line receivers

designed for use in new, high-performance ECL systems.

These devices have emitter-follower outputs and an

ended reception.

Active current sources combined with Micrel’s ASSET™

technology provide the receivers with excellent common

mode noise rejection.

The receiver design features clamp circuitry to cause a

defined output state if both the inverting and non-inverting

inputs are left open; in this case the Q output goes LOW,

while the Q output goes HIGH.

If both inverting and non-inverting inputs are at equal

potential, the receiver does

not go to a defined state, but

rather shares current in normal differential amplifier fashion,

producing output voltage levels midway between HIGH

and LOW.

voltage for single-ended reception of ECL signals to that

µF

capacitor.

For higher bandwidth, please refer to the SY10/100E416

device.

QUINT DIFFERENTIAL

LINE RECEIVER

SY10E116

SY100E116

BLOCK DIAGRAM

Pin

Function

Differential Input Pairs

Differential Output Pairs

Reference Voltage Output

PIN NAMES

Rev.: H

Amendment: /0

Issue Date:

March 2006