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SY100S321JZTR Datasheet(PDF) 1 Page - Micrel Semiconductor |
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SY100S321JZTR Datasheet(HTML) 1 Page - Micrel Semiconductor |
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1 / 6 page  1 SY100S321 Micrel, Inc. M9999-032206 hbwhelp@micrel.com or (408) 955-1690 D1 O2 D2 D3 O4 D4 D5 O6 D6 D7 O8 D8 D9 O1 O3 O5 O7 O9 LOW-POWER 9-BIT INVERTER s Max. propagation delay of 700ps s IEE min. of –55mA s Extended supply voltage option: VEE = –4.2V to –5.5V s Voltage and temperature compensation for improved noise immunity s 70% faster than Fairchild 300K at lower power s Internal 75K Ω input pull-down resistors s Function and pinout compatible with Fairchild F100K s Available in 24-pin CERPACK and 28-pin PLCC packages FEATURES BLOCK DIAGRAM The SY100S321 is a monolithic 9-bit inverter. The device contains nine inverting buffer gates with single input and output. DESCRIPTION SY100S321 Rev.: H Amendment: /0 Issue Date: March 2006 Pin Function D1 – D9 Data Inputs Q1 – Q9 Data Outputs VEES VEE Substrate VCCA VCCO for ECL Outputs PIN NAMES |
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