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TRANSLATOR Datasheet(PDF) 1 Page - Micrel Semiconductor |
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TRANSLATOR Datasheet(HTML) 1 Page - Micrel Semiconductor |
1 / 6 page 1 SY100S325 Micrel, Inc. M9999-061306 hbwhelp@micrel.com or (408) 955-1690 LOW-POWER HEX ECL-to-TTL TRANSLATOR DESCRIPTION FEATURES ■ Max. propagation delay of 3.7ns ■ IEE min. of –37mA ■ TTL outputs ■ Extended supply voltage option: VEE = –4.2V to –5.5V ■ 25% faster than National's 325 ■ Differential inputs with built-in offset ■ Voltage and temperature compensation for improved noise immunity ■ VBB output for single-ended use ■ Internal 75KΩ input pull-down resistors ■ Function and pinout compatible with Fairchild F100K ■ Available in 24-pin CERPACK and 28-pin PLCC packages The SY100S325 are hex translators for converting 100K ECL logic levels to TTL logic levels. Inputs can be used as inverting, non-inverting or differential receivers. An internal reference voltage generator provides VBB for single-ended operation or for use in Schmitt trigger applications. All inputs have 75KΩ pull-down resistors. The outputs will go LOW when the inputs are either open or have the same potential. When used in single-ended operation, the apparent input threshold of the true inputs is 20mV to 40mV higher (positive) than the threshold of the complementary inputs. The VTTL and VEE power may be applied in either order. SY100S325 PIN NAMES Pin Function D0–D5 Data Inputs D0–D5 Inverting Data Inputs Q0–Q5 Data Outputs VEES VEE Substrate VTTL TTL VCC Power Supply VCCA VCCO for ECL Outputs Rev.: H Amendment: /0 Issue Date: June 2006 BLOCK DIAGRAM D0 Q0 D0 D1 Q1 D1 D2 Q2 D2 D3 Q3 D3 D4 Q4 D4 D5 Q5 D5 VBB |
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