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AAT4626IAS-1-T1 Datasheet(PDF) 11 Page - Advanced Analog Technology, Inc. |
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AAT4626IAS-1-T1 Datasheet(HTML) 11 Page - Advanced Analog Technology, Inc. |
11 / 15 page PCB Layout Information In order to obtain the maximum performance from the AAT4626, very careful attention must be con- sidered in regard to the printed circuit board layout. In most port power switch and port protection appli- cations, high voltage and current transient events will occur. Proper PCB layout can help reduce the effects of transient events. PCB trace resistance will effect overall circuit transient response; small voltage drops will also be incurred. Refer to the following guidelines for power port PCB layout: 1. PCB traces should be kept as short and direct as possible to minimize the effects of the PCB on circuit performance. 2. Make component solder pads large to mini- mize contact resistance. 3. The AAT4626 output bulk capacitors and ferrite beads should be placed as close to the device as possible. PCB traces to the output connec- tor should be kept as short as possible to min- imized trace resistance and the associated voltage drop (I2R loss). 4. If ferrite beads are used in the circuit, select fer- rite beads with a minimum series resistance. 5. The use of PCB trace vias should be avoided on all traces that conduct high currents. If vias are necessary, make the vias as large as pos- sible and use multiple vias connected in paral- lel to minimize their effect. AAT4626 USB Dual-Channel Power Switch 4626.2006.05.1.2 11 Figure 3: Summary of Typical Circuit Voltage Drops Caused by AAT4626 Circuit Components and PCB Trace Resistance. Trace Resistance 0.01 Ω (5mV) (5mV) C BULK 0.1 μF C BULK 0.1 μF Cable, Connector and Contact Resistance 0.03 Ω (15mV) (15mV) V+ GND Input Power Supply 4.50V to 5.25V P-Channel MOSFET Switch On Resistance 0.09 Ω (45mV) AAT4626 Ch. A Ferrite Bead and PCB Trace Resistance 0.02 Ω (10mV) (10mV) VBUS GND Downstream Peripheral Port 500mA Max. Load Current Total Voltage Drop = 75mV OUTA IN GND Evaluation Board Layout The AAT4626 evaluation layout follows the recom- mend printed circuit board layout procedures and can be used as an example for good application layouts. (See Figures 4, 5, and 6.) Note that fer- rite beads are not used on this simple device eval- uation board. The board layout shown is not to scale. |
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