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SY69952ZC Datasheet(PDF) 7 Page - Micrel Semiconductor |
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SY69952ZC Datasheet(HTML) 7 Page - Micrel Semiconductor |
7 / 8 page SY69952 7 Micrel, Inc. M9999-062805 hbwhelp@micrel.com or (408) 955-1690 Symbol Parameter Min. Typ. Max. Units Condition fREF Reference Frequency 6.41 6.48 6.55 MHz MODE = 0 19.24 19.44 19.64 MHZ MODE = 1 fB Bit Time(1) 19.5 19.3 19.1 ns MODE = 0 6.50 6.43 6.36 ns MODE = 1 tODC Output Duty Cycle(2) 48 — 52 % (TCLK±, RCLK±) tRF ECL Output Rise/Fall Tiime(2) 0.4 — 1.2 ns 5pf load, 50 Ω to VCC –2 (20% to 80%) tLOCK PLL Lock Time(2) — — 1 µs RIN transition density 25% tRPWH REFCLK Pulse Width High 3.3 — — ns MODE = 0 10 — — ns MODE = 1 tRPWL REFCLK Pulse Width Low 3.3 — — ns MODE = 0 10 — — ns MODE = 1 tDV Data Valid 3 — — ns Prior to RCLK+ rising edge tDH Data Hold 1 — — ns After RCLK+ rising edge tPD Propagation Delay(3) —— 10 ns (RIN to ROUT, TSER to TOUT) VCC = +5V ±5%; VEE = GND = 0V, TA = 0°C to +85°C AC ELECTRICAL CHARACTERISTICS NOTES: 1. fB is calculated as 1/(fREF * 8). 2. Tested initially and after any design or process changes that may affect these parameters. 3. The ECL switching threshold is the differential zero crossing (ie, the point where + and – signals cross). TIMING WAVEFORMS |
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