9

SY89532/33L

Micrel, Inc.

M9999-110405

hbwhelp@micrel.com or (408) 955-1690

Crystal Input and Oscillator Interface

The SY89532/33L features a fully integrated on-board

oscillator to minimize system implementation costs. The

oscillator is a series resonant, multivibrator type design, and

thus, a series-resonant crystal is preferred, but not required.

A parallel-resonant crystal can be used with the SY89532/

33L with only a minor error in the desired frequency. A parallel-

resonant mode crystal used in a series resonant circuit will

exhibit a frequency of oscillation a few hundred ppm lower

than specified, a few hundred ppm translates to kHz

inaccuracies. In a general computer application this level of

inaccuracy is immaterial.

As the oscillator is somewhat sensitive to loading on its

inputs, the user is advised to mount the crystal as close to the

SY89532/33L as possible to avoid any board level parasitics.

In addition, trace lengths should be matched. Figure 2 shows

how to interface with a crystal. Table 1 illustrates the crystal

specifications. Certain crystals may require a 10pf capacitor

across XTAL1 and XTAL2 for proper operation. This is normally

not required, but it is recommended that provisions be made

for it.

SY89532/33L

XTAL2

(Pin 26, SOIC)

XTAL1

(Pin 25, SOIC)

XTAL

16.666MHz

Quartz Crystal Selection:

(1) Raltron Series Resonant: AS-16.666-S-SMD-T-MI

(2) Raltron Parallel Resonant: AS-16.666-18-SMD-T-MI

Optional

Figure 2. Crystal Interface

Table 1. Quartz Crystal Oscillator Specifications

OUTPUT FREQUENCY: 14MHz-18MHz

MODE OF OSCILLATION: FUNDAMENTAL

Min.

Typ.

Max.

Unit

Frequency Tolerance @25

°C

—

±30

±50

PPM

Frequency Stability over 0

°C to 70°C

—

±50

±100

ppm

Operating Temperature Range

–20

—

+70

°C

Storage Temperature Range

–55

—

+125

°C

Aging (per yr/1st 3yrs)

——

±5

ppm

Load Capacitance

—

18 (or series)

—

pF

Equivalent Series Resistance (ESR)

——

50

Ω

Drive Level

—

100

—

µW

External Loop Filter Considerations

The SY89532/33L features an external PLL loop filter that

allows the user to tailor the PLL’s behavior to their application

and operating environment. We recommend using ceramic

capacitors with NPO or X7R dielectric, as they have very low

effective series resistance. For applications that require ultra-

low cycle-to-cycle jitter, use the components shown in Figure

3. The PLL loop bandwidth is a function of feedback divider

ratio, and the external loop filter allows the user to compensate.

For instance, the PLL’s loop bandwidth can be decreased by

using a smaller resistor in the loop filter. This results in less

noise from the PLL input, but potentially more noise from the

VCO. Refer to “AC Electrical Characteristics” for target PLL

loop bandwidth. The designer should take care to keep the

loop filter components on the same side of the board and as

close as possible to the SY89532/33L’s LOOP_REF and

LOOP_FILTER pins. To insure minimal noise pick up on the

loop filter, it is desirable to cut away the ground plane directly

underneath the loop filter component pads and traces.

However, the benefit may not be significant in all applications

and one must be careful to not alter the characteristic

impedance of nearby traces.

C2

470pF

Loop

Filter

Loop

Reference

R1

330

C1

0.2µF

Figure 3. External Loop Filter Connection