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SY89873LMI Datasheet(PDF) 5 Page - Micrel Semiconductor |
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SY89873LMI Datasheet(HTML) 5 Page - Micrel Semiconductor |
5 / 11 page 5 Precision Edge® SY89873L Micrel, Inc. M9999-020707 hbwhelp@micrel.com or (408) 955-1690 VCC = 3.3V ±10%; TA = –40°C to +85°C; Unless otherwise stated. Symbol Parameter Condition Min Typ Max Units fMAX Maximum Output Toggle Frequency Output Swing: ≥ 200mV 2.0 GHz (Bank A and Bank B) Maximum Input Frequency Note 14 3.2 GHz tPD Differential Propagation Delay Input Swing < 400mV 550 660 800 ps (IN-to-Q) Input Swing ≥ 400mV 500 610 750 ps tSKEW Within-Device Skew (diff.) Note 15 7 15 ps (QB0-to-QB1) Within-Device Skew (diff.) Note 15 12 30 ps (Bank A-to-Bank B) Part-to-Part Skew (diff.) Note 15 250 ps trr Reset Recovery Time Note 16 600 ps Tjitter Cycle-to-Cycle Jitter Note 17 1 psRMS Total Jitter Note 18 10 psPP tr, tf Rise / Fall Time (20% to 80%) 60 110 190 ps Notes: 13. Measured with 400mV input signal, 50% duty cycle. All outputs terminated with 100Ω between Q and /Q, unless otherwise stated. 14. Bank A (pass-through) maximum frequency is limited by the output stage. Bank B (input-to-output ÷2, ÷4, ÷8, ÷16) can accept an input frequency >3GHz, while Bank A will be slew-rate limited. 15. Skew is measured between outputs under identical transitions. 16. See “Timing Diagram.” 17. Cycle-to-cycle jitter definition: the variation in period between adjacent cycles over a random sample of adjacent cycle pairs. Tjitter_cc=Tn–Tn+1, where T is the time between rising edges of the output signal. 18. Total jitter definition: with an ideal clock input, of frequency ≤ fMAX (device), no more than one output edge in 10 12 output edges will deviate by more than the specified peak-to-peak jitter value. AC ELECTRICAL CHARACTERISTICS(13) |
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