1

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FN1963.4

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

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Copyright © Intersil Americas Inc. 2002. All Rights Reserved

CDP68HC68A2

CMOS Serial 10-Bit A/D Converter

The CDP68HC68A2 is a CMOS 8-bit or 10-bit successive

approximation analog to digital converter (A/D) with a

standard Serial Peripheral Interface (SPI) bus and eight

multiplexed analog inputs. Voltage referencing is user

The CDP68HC68A2 employs a switched capacitor,

successive approximation A/D conversion technique which

provides an inherent sample-and-hold function. An onchip

Schmitt oscillator provides the internal timing for the A/D

converter. The Schmitt input can be externally clocked or

connected to a single, external capacitor to form an RC

oscillator with a period of approximately 10-30ns per

picofarad.

Conversion times are proportional to the oscillator period. At

the maximum specified frequency of 1MHz, 10-bit

conversions take 14

µs per channel. At the same frequency,

8-bit conversions consume 12

µs per channel.

The versatile modes of the CDP68HC68A2 allow any

combination of the eight input channels to be enabled and

any one of the selected channels to be specified as the

“starting” channel. Conversions proceed sequentially

beginning with the starting channel. Nonselected channels

are skipped. Modes can be selected to: sequence from

channel to channel on command; sequence through

channels automatically, converting each channel one time;

or sequence repeatedly through all channels.

The results of 10-bit conversions are stored in 8-bit register

pairs (one pair per channel). The two most significant bits

are stored in the first register of each pair and the eight least

significant bits are stored in the second register of the pair.

To allow faster access, in the 8-bit mode, the results of

conversions are stored in a single register per channel.

A read-only STATUS register facilitates monitoring the

status of conversions. The STATUS register can simply be

polled or the INT pin can be enabled for interrupt driven

communications.

Features

• 10-Bit Resolution

• 8-Bit Mode for Single Data Byte Transfers

• SPI (Serial Peripheral Interface) Compatible

Source

•14

µs 10-Bit Conversion Time

• 8 Multiplexed Analog Input Channels

• Independent Channel Select

• Three Modes of Operation

• On Chip Oscillator

• Low Power CMOS Circuitry

• Intrinsic Sample and Hold

Pinouts

CDP68HC68A2E (PDIP)

TOP VIEW

CDP68HC68A2M (SOIC)

TOP VIEW

Ordering Information

PART NUMBER

TEMP. RANGE

PACKAGE

PKG.

NO.

CDP68HC68A2E

-40 to 85

16 Ld PDIP

E16.3

CDP68HC68A2M

-40 to 85

20 Ld SOIC

M20.3

CDP68HC68A2M96

-40 to 85

Tape & Reel

M20.3

14

15

16

9

13

12

11

10

1

2

3

4

5

7

6

8

OSC

INT

MISO

MOSI

SCK

CE

AI0 / EXT. REF

AI2

AI3

AI4

AI5

AI6

AI7

AI1

11

12

13

14

15

16

17

18

20

19

10

9

8

7

6

5

4

3

2

1

OSC

INT

MISO

MOSI

NC

NC

CE

SCK

AI0 / EXT. REF

AI2

AI3

NC

AI1

NC

AI4

AI5

AI6

AI7

Data Sheet

April 2002