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PCA9515ADGKR Datasheet(PDF) 8 Page - Texas Instruments |
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PCA9515ADGKR Datasheet(HTML) 8 Page - Texas Instruments |
8 / 13 page www.ti.com 9th Clock Pulse VOL of PCA9515A VOL of Slave SCL SDA PCA9515A DUAL BIDIRECTIONAL I2C BUS AND SMBus REPEATER SCPS150A – DECEMBER 2005 – REVISED JUNE 2006 APPLICATION INFORMATION (continued) Figure 4. Bus 1 Waveforms On the Bus 1 side of the PCA9515A, the clock and data lines have a positive offset from ground equal to the VOL of the PCA9515A. After the eighth clock pulse, the data line is pulled to the VOL of the slave device, which is very close to ground in the example. It is important to note that any arbitration or clock-stretching events on Bus 1 require that the VOL of the devices on Bus 1 be 70 mV below the VOL of the PCA9515A (see VOL – VILc in Electrical Characteristics) to be recognized by the PCA9515A and transmitted to Bus 0. 8 Submit Documentation Feedback |
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