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PCA9539DBQR Datasheet(PDF) 5 Page - Texas Instruments |
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PCA9539DBQR Datasheet(HTML) 5 Page - Texas Instruments |
5 / 34 page www.ti.com VCC CLK D Q FF Configuration Register Data From Shift Register Data From Shift Register Q Write Configuration Pulse CLK D Q FF Q Write Pulse Output Port Register Q1 Q2 GND I/O Pin Output Port Register Data CLK D Q FF Q Input Port Register Read Pulse CLK D Q FF Q Polarity Inversion Register Write Polarity Pulse Input Port Register Data Polarity Register Data To INT Data From Shift Register I/O Port PCA9539 REMOTE 16-BIT I2C AND SMBus LOW-POWER I/O EXPANDER WITH INTERRUPT OUTPUT, RESET, AND CONFIGURATION REGISTERS SCPS130D – AUGUST 2005 – REVISED MARCH 2007 SIMPLIFIED SCHEMATIC OF P-PORT I/Os(1) (1) At power-on reset, all registers return to default values. When an I/O is configured as an input, FETs Q1 and Q2 are off, which creates a high-impedance input. The input voltage may be raised above VCC to a maximum of 5.5 V. If the I/O is configured as an output, Q1 or Q2 is enabled, depending on the state of the Output Port register. In this case, there are low-impedance paths between the I/O pin and either VCC or GND. The external voltage applied to this I/O pin should not exceed the recommended levels for proper operation. 5 Submit Documentation Feedback |
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