HEF4755V datasheet(3/12 Pages) PHILIPS

Part #	HEF4755V

Description	Transceiver for serial data communication

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Manufacturer	PHILIPS [NXP Semiconductors]

Direct Link	http://www.nxp.com

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January 1995

3

Philips Semiconductors

Product speciﬁcation

Transceiver for serial data communication

HEF4755V

LSI

HEF4755VP(N):

28-lead DIL; plastic

(SOT117-2)

HEF4755VD(F):

28-lead DIL; ceramic (cerdip)

(SOT135)

HEF4755VT(D):

28-lead SO; plastic

(SOT136-1)

( ): Package Designator North America

PINNING

1

TST

Test pin; during normal use

connected to VSS. When TST is

HIGH (VDD), internal check points

are connected to the data bus.

2

ML0

Input code for message length (see

Table 1).

3

ML1

4

DIO0

Bidirectional data bus.

to

11

DIO7

12

RX

Mode input: receive; see Table 2

13

TX

Mode input: transmit; see Table 2

15

AS

Mode input: asynchronous;

see Table 2

16

R

Reset; a positive signal resets

all internal registers.

17

START

Input start in transmitting mode;

synchronization input (from MOS)

in synchronous receiving mode.

18

BUSY

Output busy; active during

receiving or transmitting a message.

19

HD

Hamming distance; determines the

length of the redundancy byte:

LOW = 7 bit (HD = 4)

HIGH = 15 bit (HD = 6)

20

MOS

Output message synchronization

used in synchronous mode.

21

MO

Message output.

22

MI

Message input.

23

DP

Output data pulse; take-over pulse

for data on the data bus.

24

ERR

Output error; an active output

means that at least 1 transmission

error is recognized.

25

CP

Clock input; in synchronous mode

equal to the transmission bit rate.

26

TT1

Programming of the permissible time

tolerance in bit distortion

(see Table 3).

27

TT0

28

VDD

Positive supply voltage; 4,5 V to

12,5 V (is the logic HIGH level).

14

VSS

Ground (is the logic LOW level).

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