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SMC83C795 Datasheet(PDF) 7 Page - SMSC Corporation

Part # SMC83C795
Description  Ethernet System Controller
Download  136 Pages
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Manufacturer  SMSC [SMSC Corporation]
Direct Link  http://www.smsc.com
Logo SMSC - SMSC Corporation

SMC83C795 Datasheet(HTML) 7 Page - SMSC Corporation

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LIST OF FIGURES
FIGURE 1-1. 83C795 BLOCK DIAGRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
FIGURE 3-1. 83C790 DATA PATH FLOW. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
FIGURE 4-1. 83C790 PIN OUT DIAGRAM (160 PINS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
FIGURE 6-1. MEMORY CACHE ARRANGEMENT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
FIGURE 6-2. OVERLAPPING ADDRESS STRUCTURE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
FIGURE 6-3. EXTERNAL CASCADED ADDRESS DECODER . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
FIGURE 6-4. ADDRESS GENERATION PATH. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
FIGURE 6-5. INTERRUPT CONTROL LOGIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
FIGURE 6-6. EEROM REGISTER LOGIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
FIGURE 6-7. PLUG AND PLAY STATE MACHINE. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
FIGURE 6-8. PLUG AND PLAY CONFIGURATION REGISTERS . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
FIGURE 7-1. BASIC DMA CYCLES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
FIGURE 7-2. AUI/TWISTED-PAIR INTERFACE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
FIGURE 7-3. SIMPLIFIED TRANSMIT CIRCUITRY. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
FIGURE 8-1. MULTIPLE FRAME TRANSMIT BUFFER FORMAT. . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
FIGURE 8-2. RECEIVER BUFFER FORMAT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
FIGURE 8-3. RING BUFFER STRUCTURE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
FIGURE 8-4. RECEIVER BUFFER RING 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
FIGURE 8-5. RECEIVER BUFFER RING 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87
FIGURE 8-6. LINKED-LIST BUFFER FORMAT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88
FIGURE 10-1. SYSTEM CLOCK TIMING . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97
FIGURE 10-2. REGISTER ACCESS TIMING - READ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97
FIGURE 10-3. REGISTER ACCESS TIMING - WRITE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98
FIGURE 10-4. 16-BIT REGISTER ACCESS (I/O PIPE ONLY). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98
FIGURE 10-5. HOST MEMORY ACCESS (16-BIT, ZWS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99
FIGURE 10-6. HOST MEMORY ACCESS (16-BIT, NO ZWS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100
FIGURE 10-7. HOST MEMORY ACCESS (8-BIT, ZWS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101
FIGURE 10-8. HOST MEMORY ACCESS (8-BIT, NO ZWS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102
FIGURE 10-9. ROM ACCESS (8-BIT ONLY, READ ONLY) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103
FIGURE 10-10. DMA OR MEMORY CACHE WRITES. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104
FIGURE 10-11. DMA OR MEMORY CACHE READS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105
FIGURE 10-12. EEPROM INTERFACE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106
FIGURE 10-13. TRANSMIT TIMING - START OF TRANSMISSION . . . . . . . . . . . . . . . . . . . . . . . . . . 107
FIGURE 10-14. TRANSMIT TIMING - END OF TRANSMISSION . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108
FIGURE 10-15. TRANSMIT TIMING - END OF TRANSMISSION . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109
FIGURE 10-16. RECEIVE TIMING - START OF PACKET . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110
83C795
LIST OF FIGURES
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