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ICM7226A Datasheet(PDF) 9 Page - Intersil Corporation |
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ICM7226A Datasheet(HTML) 9 Page - Intersil Corporation |
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9 / 19 page  9 Frequency - In this mode input A is counted by the Main Counter for a precise period of time. This time is determined by the time base oscillator and the selected range. For the 10MHz (or 1MHz) time base, the resolutions are 100Hz, 10Hz, 1Hz and 0.1Hz. The decimal point on the display is set for kHz reading. Period - In this mode, the timebase oscillator is counted by the Main Counter for the duration of 1, 10, 100 or 1000 (range selected) periods of the signal at input A. A 10MHz timebase gives resolutions of 0.1 µs to 0.0001µs for 1000 periods averaging. Note that the maximum input frequency for period measurement is 2.5MHz. Frequency Ratio - In this mode, the input A is counted by the Main Counter for the duration of 1, 10, 100 or 1000 (range selected) periods of the signal at input B. The fre- quency at input A should be higher than input B for meaning- ful result. The result in this case is unitless and its resolution can go up to 3 digits after decimal point. Time Interval - In this mode, the timebase oscillator is counted by the Main Counter for the duration of a 1-0 transition of input A until a 1-0 transition of input B. This means input A starts the counting and input B stops it. If other ranges, except 0.01s/1 cycle are selected the sequence of input A and B transitions must happen 10, 100 or 1000 times until the display becomes updated; note this when measuring long time intervals to give enough time for measurement completion. The resolution in this mode is the same as for period measurement. See the Time Interval Measurement section also. Unit Counter - In this mode, the Main Counter is always enabled. The input A is counted by the Main Counter and displayed continuously. Oscillator Frequency - In this mode, the device makes a frequency measurement on its timebase. This is a self test mode for device functionality check. For 10MHz timebase the display will show 10000.0, 10000.00, 10000.000 and Overflow in different ranges. Range Input The RANGE INPUT selects whether the measurement period is made for 1,10,100 or 1000 counts of the Reference Counter or it is controlled by EXT RANGE input. As it is shown in Table 1, this gives different counting windows for frequency measurement and various cycles for other modes of measurement. In all functional modes except Unit Counter, any change in the RANGE INPUT will stop the present measurement with- out updating the display and then initiate a new measure- ment. This prevents an erroneous first reading after the RANGE INPUT is changed. Control Input Unlike the other multiplexed inputs, to which only one of the digit outputs can be connected at a time, this input can be tied to different digit lines to select combination of controls. In this case, isolation diodes must be used in digit lines to avoid crosstalk between them (see Figure 19). The direction of diodes depends on the device version, common anode or common cathode. For maximum noise immunity at this input, in addition to the 10K resistor which was mentioned before, a 39pF to 100pF capacitor should also be placed between this input and the VDD or VSS (See Figure 19). Display Off - To disable the display drivers, it is necessary to tie the D4 line to the CONTROL INPUT and have the HOLD input at VDD. While in Display Off mode, the segments and digit driv- ers are all off, leaving the display lines floating, so the display can be shared with other devices. In this mode, the oscillator continues to run with a typical supply current of 1.5mA with a 10MHz crystal, but no measurements are made and multi- plexed inputs are inactive. A new measurement cycle will be ini- tiated when the HOLD input is switched to VSS. Display Test - Display will turn on with all the digits showing 8s and all decimal points also on. The display will be blanked if Display Off is selected at the same time. 1MHz Select - The 1MHz select mode allows use of a 1MHz crystal with the same digit multiplex rate and time between measurement as with a 10MHz crystal. This is done by divid- ing the oscillator frequency by 104 rather than 105. The dec- imal point is also shifted one digit to the right in period and time interval, since the least significant digit will be in µs increment rather than 0.1 µs increment. External Oscillator Enable - In this mode, the signal at EXT OSC INPUT is used as a timebase instead of the on-board crystal oscillator (built around the OSC INPUT, OSC OUTPUT inputs). This input can be used for an external stable tempera- ture compensated crystal oscillator or for special measure- ments with any external source. The on-board crystal oscillator continues to work when the external oscillator is selected. This is necessary to avoid hang-up problems, and has no effect on the chip's functional operation. If the on-board oscillator fre- quency is less than 1MHz or only the external oscillator is used, THE OSC INPUT MUST BE CONNECTED TO THE EXT OSC INPUT providing the timebase has enough voltage swing for OSC INPUT (See Electrical Specifications). If the external time- base is TTL level a pullup resistor must be used for OSC INPUT. The other way is to put a 22M Ω resistor between OSC INPUT and OSC OUTPUT and capacitively couple the EXT OSC INPUT to OSC INPUT. This will bias the OSC INPUT at its threshold and the drive voltage will need to be only 2VP-P. The external timebase frequency must be greater than 100kHz or the chip will reset itself to enable the on-board oscillator. External Decimal Point Enable - In this mode, the EX DP INPUT is enabled. A decimal point will be displayed for the digit that its output line is connected to this input (EX DP INPUT). Digit 8 should not be used since it will override the overflow output. Leading zero blanking is effective for the digits to the left of selected decimal point. Hold Input Except in the unit counter mode, when the HOLD input is at VDD, any measurement in progress (before STORE goes low) is stopped, the main counter is reset and the chip is held ready to initiate a new measurement as soon as HOLD goes low. The latches which hold the main counter data are not updated, so the last complete measurement is displayed. In unit counter mode when HOLD input is at VDD,the counter is not stopped or reset, but the display is frozen at that instantaneous value. When HOLD goes low the count continues from the new value in the new counter. ICM7226A, ICM7226B |
Similar Part No. - ICM7226A_01 |
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Similar Description - ICM7226A_01 |
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