FUNCTIONAL DESCRIPTION

The SYNC and CLOCK inputs establish data synchronization

utilizing two AND gates, one for each data input (figure 2).

Each logic input, including the power enable (

) input,

are TTL/CMOS compatible.

Figure 1 illustrates a typical ARINC 429 bus application.

Three power supplies are necessary to operate the HI-3182;

typically +15V, -15V and +5V. The chip also works with ±12V

supplies. The +5V supply can also provide a reference

voltage that determines the output voltage swing.

The

differential output voltage swing will equal 2V

. If a value of

V

other than +5V is needed, a separate +5V power supply

is required for pin V .

With the DATA (A) input at a logic high and DATA (B) input at a

logic low, A

will switch to the +V

rail and B

will

switch to the -V

rail (ARINC HIGH state). With both data

input signals at a logic low state, the outputs will both switch to

0V (ARINC NULL state).

The driver output impedance, R

, is nominally 75, 26 or 0

ohms depending on the option chosen. The rise and fall times

of the outputs can be calibrated through the selection of two

external capacitor values th

re connected to the C and C

input pins. Typical values for high-speed operation

(100KBPS) are C = C = 75pF and for low-speed operation

(12.5 to 14KBPS) C = C = 500pF.

STROBE

REF

REF

OUT

REF

OUT

REF

OUT

1

AB

AB

AB

at a

The C and C pins swing between +5V and ground allowing

the switching of capacitor values with an external single-

supply analog switch.

AB

The ARINC outputs can be put in a tri-state mode by applying

a logic high to the

input pin. If this feature is not

being used, the pin should be tied to ground. The

STROBE

STROBE

function is not available in the 14 & 16-pin SOIC package

configurations where the pin is internally connected to

ground.

The ARINC outputs of the HI-3182, HI-3184 and HI-3187 are

protected by internal fuses capable of sinking between 800 -

900 mA for short periods of time (125 s).

The Vref pin has an internal pull-up resistor to V+, allowing the

use of a simple external zener diode to set the reference

voltage.

m

POWER SUPPLY SEQUENCING

The power supplies should be controlled to prevent large

currents during supply turn-on and turn-off. The

recommended sequence is +V followed by V , always

ensuring that +V is the most positive supply. The -V supply

is not critical and can be asserted at any time.

1

HI-3182, HI-3183, HI-3184, HI-3185, HI-3186, HI-3187, HI-3188

DATA (A)

OUT

DATA (B)

INPUTS

TO ARINC BUS

A

OUT

B

REF

V

1

V

SYNC

CLOCK

-V

+V

STROBE

GND

B

A

C

C

-15V

+15V

+5V

Figure 1. ARINC 429 BUS APPLICATION

Figure 2. FUNCTIONAL BLOCK DIAGRAM

OUT

B

Shorted on

HI-3186, HI-3187, HI-3188

REF

OUT

A

OUTPUT

DRIVER (B)

OUTPUT

DRIVER (A)

B

C

GND

-V

DATA (A)

DATA (B)

SYNC

CLOCK

STROBE

A

C

V

+V

LEVEL SHIFTER

AND SLOPE

CONTROL (B)

LEVEL SHIFTER

AND SLOPE

CONTROL (A)

CURRENT

REGULATOR

13

W

13

W

24.5

W

Shorted on

HI-3183, HI-3186

HI-3187, HI-3188

Shorted on

HI-3183, HI-3185

HI-3186, HI-3188

24.5

W

HOLT INTEGRATED CIRCUITS

2