EM6A9325 datasheet(8/51 Pages) ETRON

Part #	EM6A9325

Description	4M x 32 Low Power SDRAM (LPSDRAM)

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Manufacturer	ETRON [Etron Technology, Inc.]

Direct Link	http://www.etron.com

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EtronTech

4M x 32 LPSDRAM

EM6A9325

Preliminary

8

Rev 0.4

June 2003

READ A

NOP

WRITE B

NOP

CLK

DQM

COM MAND

DQ's

T0

T1T2

T3T4

T5

T6

T7

T8

NOP

DOUT A0

DI NB0

DINB1

DI NB2

Must be Hi-Z before

the Write Command

: "H" or "L"

Read to Write Interval (Burst Length

≧ 4, CAS# Latency = 3)

CLK

DQM

COMMAND

T0

T 1

T2T3

T4T5

T6T7

T8

NOP

BANKA

ACTIVATE

DIN A0

DIN A1

DIN A2

DIN A3

1 Clk Interval

CAS# latency=2

tCK2, DQ's

READ A

WRITE A

: "H" or "L"

Read to Write Interval (Burst Length

≥ 4, CAS# Latency = 2)

CLK

DQM

COMMAND

T0

T 1

T2

T3

T4

T5

T6

T7

T8

NOP

READ A

NOP

WRITE B

NOP

DIN B0

DIN B1

DIN B2

DIN B3

CAS# latency=2

tCK2, DQ's

NOP

: "H" or "L"

Read to Write Interval (Burst Length

≥ 4, CAS# Latency = 2)

A read burst without the auto precharge function may be interrupted by a BankPrecharge/

PrechargeAll command to the same bank. The following figure shows the optimum time that

BankPrecharge/ PrechargeAll command is issued in different CAS# latency.

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EM6A9325 Datasheet(PDF) 8 Page - Etron Technology, Inc.

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