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AM29DL322GB40WDI Datasheet(PDF) 43 Page - SPANSION |
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AM29DL322GB40WDI Datasheet(HTML) 43 Page - SPANSION |
43 / 58 page December 4, 2006 25686B10 Am29DL32xG 41 D A TA SH EE T AC CHARACTERISTICS Erase and Program Operations Notes: 1. Not 100% tested. 2. See the “Erase And Programming Performance” section for more information. Parameter Speed Options JEDEC Std Description 70 90 120 Unit t AVAV t WC Write Cycle Time (Note 1) Min 70 90 120 ns t AVWL t AS Address Setup Time Min 0 ns tASO Address Setup Time to OE# low during toggle bit polling Min 15 15 ns tWLAX tAH Address Hold Time Min 45 45 50 ns t AHT Address Hold Time From CE# or OE# high during toggle bit polling Min 0 ns tDVWH tDS Data Setup Time Min 35 45 50 ns tWHDX tDH Data Hold Time Min 0 ns tOEPH Output Enable High during toggle bit polling Min 20 ns tGHWL tGHWL Read Recovery Time Before Write (OE# High to WE# Low) Min 0 ns tELWL tCS CE# Setup Time Min 0 ns tWHEH tCH CE# Hold Time Min 0 ns tWLWH tWP Write Pulse Width Min 30 35 50 ns tWHDL tWPH Write Pulse Width High Min 30 ns tSR/W Latency Between Read and Write Operations Min 0 ns tWHWH1 tWHWH1 Programming Operation (Note 2) Byte Typ 5 µs Word Typ 7 t WHWH1 t WHWH1 Accelerated Programming Operation, Word or Byte (Note 2) Typ 4 µs t WHWH2 t WHWH2 Sector Erase Operation (Note 2) Typ 0.4 sec t VCS V CC Setup Time (Note 1) Min 50 µs t RB Write Recovery Time from RY/BY# Min 0 ns t BUSY Program/Erase Valid to RY/BY# Delay Max 90 ns |
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