AM49PDL129BH66IS datasheet(6/86 Pages) SPANSION

Part #	AM49PDL129BH66IS

Description	128 Megabit (8 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory and 32 Mbit (2 M x 16-Bit) CMOS

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Am49PDL127BH/Am49PDL129BH

December 16, 2003

ADV ANCE

I N FO RMAT I O N

TABLE OF CONTENTS

PDL127 Configuration ........................................................... 3

PDL129H Configuration ......................................................... 3

Product Selector Guide . . . . . . . . . . . . . . . . . . . . . 6

MCP Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . 6

Connection Diagram–PDL129 . . . . . . . . . . . . . . . . 7

Special Package Handling Instructions .................................... 7

Connection Diagram–PDL127 . . . . . . . . . . . . . . . . 8

Special Package Handling Instructions .................................... 8

Look Ahead Ballout Diagram . . . . . . . . . . . . . . . . 10

Ordering Information . . . . . . . . . . . . . . . . . . . . . . 12

MCP Device Bus Operations . . . . . . . . . . . . . . . . 13

Requirements for Reading Array Data ................................... 15

Random Read (Non-Page Read) ........................................ 15

Page Mode Read ................................................................ 15

Table 2. Page Select .......................................................................15

Simultaneous Operation ......................................................... 15

Table 3. Bank Select (PDL129H) ....................................................15

Table 4. Bank Select (PDL127H) ....................................................15

Writing Commands/Command Sequences ............................ 16

Accelerated Program Operation .......................................... 16

Autoselect Functions ........................................................... 16

Standby Mode ........................................................................ 16

Automatic Sleep Mode ........................................................... 16

RESET#: Hardware Reset Pin ............................................... 17

Output Disable Mode .............................................................. 17

Table 5. Am29PDL127H Sector Architecture ..................................18

Table 6. Am29PDL129H Sector Architecture ..................................25

Table 7. SecSi

TM Sector Addresses ................................................32

Table 8. Am29PDL127H Boot Sector/Sector Block Addresses for Pro-

tection/Unprotection ........................................................................33

Table 9. Am29PDL129H Boot Sector/Sector Block Addresses for Pro-

tection/Unprotection ........................................................................34

Sector Protection . . . . . . . . . . . . . . . . . . . . . . . . . 35

Persistent Sector Protection ................................................... 35

Persistent Protection Bit (PPB) ............................................ 35

Persistent Protection Bit Lock (PPB Lock) .......................... 35

Dynamic Protection Bit (DYB) ............................................. 35

Table 10. Sector Protection Schemes .............................................36

Persistent Sector Protection Mode Locking Bit ................... 36

Password Protection Mode ..................................................... 36

Password and Password Mode Locking Bit ........................ 37

64-bit Password ................................................................... 37

Write Protect (WP#) ................................................................ 37

Persistent Protection Bit Lock .............................................. 37

High Voltage Sector Protection .............................................. 38

Figure 1. In-System Sector Protection/

Sector Unprotection Algorithms ...................................................... 39

Temporary Sector Unprotect .................................................. 40

Figure 2. Temporary Sector Unprotect Operation........................... 40

SecSi™ (Secured Silicon) Sector

Flash Memory Region ............................................................ 40

Factory-Locked Area (64 words) ......................................... 40

Customer-Lockable Area (64 words) ................................... 40

Figure 3. PDL127H/129H SecSi Sector Protection Algorithm......... 41

SecSi Sector Protection Bits ................................................ 41

Figure 4. SecSi Sector Protect Verify.............................................. 42

Hardware Data Protection ...................................................... 42

Low VCC Write Inhibit ......................................................... 42

Write Pulse “Glitch” Protection ............................................ 42

Logical Inhibit ....................................................................... 42

Power-Up Write Inhibit ......................................................... 42

Common Flash Memory Interface (CFI) . . . . . . . 42

Command Definitions . . . . . . . . . . . . . . . . . . . . . 46

Reading Array Data ................................................................ 46

Reset Command ..................................................................... 46

Autoselect Command Sequence ............................................ 46

Enter SecSi™ Sector/Exit SecSi Sector

Command Sequence .............................................................. 47

Word Program Command Sequence ...................................... 47

Unlock Bypass Command Sequence .................................. 47

Figure 5. Program Operation ......................................................... 48

Chip Erase Command Sequence ........................................... 48

Sector Erase Command Sequence ........................................ 48

Figure 6. Erase Operation.............................................................. 49

Erase Suspend/Erase Resume Commands ........................... 49

Password Program Command ................................................ 49

Password Verify Command .................................................... 50

Password Protection Mode Locking Bit Program Command .. 50

Persistent Sector Protection Mode Locking Bit Program Com-

mand ....................................................................................... 50

SecSi Sector Protection Bit Program Command .................... 50

PPB Lock Bit Set Command ................................................... 50

DYB Write Command ............................................................. 50

Password Unlock Command .................................................. 50

PPB Program Command ........................................................ 51

All PPB Erase Command ........................................................ 51

DYB Write Command ............................................................. 51

PPB Lock Bit Set Command ................................................... 51

PPB Status Command ............................................................ 51

PPB Lock Bit Status Command .............................................. 51

Sector Protection Status Command ....................................... 51

Command Definitions Tables .................................................. 52

Table 15. Memory Array Command Definitions ............................. 52

Table 16. Sector Protection Command Definitions ........................ 53

Write Operation Status . . . . . . . . . . . . . . . . . . . . 54

DQ7: Data# Polling ................................................................. 54

Figure 7. Data# Polling Algorithm .................................................. 54

RY/BY#: Ready/Busy# ............................................................ 55

DQ6: Toggle Bit I .................................................................... 55

Figure 8. Toggle Bit Algorithm........................................................ 55

DQ2: Toggle Bit II ................................................................... 56

Reading Toggle Bits DQ6/DQ2 ............................................... 56

DQ5: Exceeded Timing Limits ................................................ 56

DQ3: Sector Erase Timer ....................................................... 56

Table 17. Write Operation Status ................................................... 57

Absolute Maximum Ratings . . . . . . . . . . . . . . . . 58

Figure 9. Maximum Negative Overshoot Waveform ...................... 58

Figure 10. Maximum Positive Overshoot Waveform...................... 58

ESD Immunity . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58

DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 59

Test Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . 61

Figure 11. Test Setup.................................................................... 61

Figure 12. Input Waveforms and Measurement Levels ................. 61

pSRAM AC Characteristics . . . . . . . . . . . . . . . . . 62

CE#1ps Timing ....................................................................... 62

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