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HI5710AJCQ Datasheet(PDF) 11 Page - Intersil Corporation |
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HI5710AJCQ Datasheet(HTML) 11 Page - Intersil Corporation |
11 / 21 page 11 22 CLK Clock Pin. 41 CAL Calibration Pulse Input, calibration starts on a falling edge, normally high. 15 RESET Calibration Circuit Reset and Internal Calibration Function Restart, resets with a negative pulse, normally high. 14 TIN Factory Test Signal Input, normally tied to AVSS or AVDD. 29, 30 VRT Reference Top, normally 4.0V. 34, 35 VRB Reference Bottom, normally 2.0V. 38 AT Factory Test Signal Output, leave pin open. 42 TS Factory Test Signal Input, tie to AVDD. 37 TSTR Factory Test Signal Input, tie to AVSS. Pin Description and I/O Pin Equivalent Circuit (Continued) PIN NUMBER SYMBOL EQUIVALENT CIRCUIT DESCRIPTION 22 AVSS AVDD 41 AVSS AVDD 15 AVSS AVDD AVDD AVSS 29, 30 34, 35 HI5710A |
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