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HI7191IBZ-T Datasheet(PDF) 4 Page - Intersil Corporation |
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HI7191IBZ-T Datasheet(HTML) 4 Page - Intersil Corporation |
4 / 25 page 4 FN4138.8 June 1, 2006 Absolute Maximum Ratings Thermal Information Supply Voltage AVDD to AGND. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +5.5V AVSS to AGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -5.5V DVDD to DGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +5.5V DGND to AGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±0.3V Analog Input Pins. . . . . . . . . . . . . . . . . . . . . . . . . . . . AVSS to AVDD Digital Input, Output and I/O Pins . . . . . . . . . . . . . . DGND to DVDD ESD Tolerance (No Damage) Human Body Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .500V Machine Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+100V Charged Device Model. . . . . . . . . . . . . . . . . . . . . . . . . . . . .1000V Operating Conditions Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to 85°C Thermal Resistance (Typical, Note 1) θ JA (°C/W) PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125 SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 Maximum Junction Temperature Plastic Packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C Maximum Storage Temperature Range . . . . . . . . . . . -65°C to 150°C Maximum Lead Temperature (Soldering, 10s). . . . . . . . . . . . . 300°C (SOIC - Lead Tips Only) CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. θ JA is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details. Electrical Specifications AVDD = +5V, AVSS = -5V, DVDD = +5V, VRHI = +2.5V, VRLO = AGND = 0V, VCM = AGND, PGIA Gain = 1, OSCIN = 10MHz, Bipolar Input Range Selected, fN = 10Hz PARAMETER TEST CONDITIONS MIN TYP MAX UNITS SYSTEM PERFORMANCE Integral Non-Linearity, INL End Point Line Method (Notes 3, 5, 6) - ±0.0015 ±0.003 %FS Differential Non-Linearity (Note 2) No Missing codes to 20-Bits LSB Offset Error, VOS (See Table 1) - - - - Offset Error Drift VINHI = VINLO (Notes 3, 8) - 1 - μV/ °C Full Scale Error, FSE VINHI - VINLO = +2.5V (Notes 3, 5, 8, 10) - - - - Noise, eN (See Table 1) - - - - Common Mode Rejection Ratio, CMRR VCM = 0V, VINHI = VINLO from -2V to +2V - 70 - dB Normal Mode 50Hz Rejection Filter Notch = 10Hz, 25Hz, 50Hz (Note 2) 120 - - dB Normal Mode 60Hz Rejection Filter Notch = 10Hz, 30Hz, 60Hz (Note 2) 120 - - dB Step Response Settling Time - 2 4 Conversions ANALOG INPUTS Input Voltage Range Unipolar Mode (Note 9) 0 - VREF V Input Voltage Range Bipolar Mode (Note 9) - VREF -VREF V Common Mode Input Range (Note 2) AVSS -AVDD V Input Leakage Current, IIN VIN = AVDD (Note 2) - - 1.0 nA Input Capacitance, CIN -5.0 - pF Reference Voltage Range, VREF (VREF = VRHI - VRLO) 2.5 - 5 V Transducer Burn-Out Current, IBO - 200 - nA CALIBRATION LIMITS Positive Full Scale Calibration Limit - - 1.2(VREF/Gain) - Negative Full Scale Calibration Limit - - 1.2(VREF/Gain) - Offset Calibration Limit - - 1.2(VREF/Gain) - Input Span 0.2(VREF/Gain) - 2.4(VREF/Gain) - DIGITAL INPUTS Input Logic High Voltage, VIH (Note 11) 2.0 - - V Input Logic Low Voltage, VIL -- 0.8 V HI7191 |
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