 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
HI3026A Datasheet(PDF) 9 Page - Intersil Corporation |
|
||||||||||||||||||||||||||||||
HI3026A Datasheet(HTML) 9 Page - Intersil Corporation |
|
|
9 / 17 page  9 Notes On Operation • The HI3026A is a high-speed A/D converter which is capa- ble of TTL, ECL and PECL level clock input. Characteristic impedance should be properly matched to ensure opti- mum performance during high-speed operation. • The power supply and grounding have a profound influence on converter performance. The power supply and grounding method are particularly important during high-speed operation. General points for caution are as follows: - The ground pattern should be as large as possible. It is recommended to make the power supply and ground patterns wider at an inner layer using a multi-layer board. - To prevent interference between AGND and DGND and between AVCC and DVCC, make sure the respective pat- terns are separated. To prevent a DC offset in the power supply pattern, connect the AVCC and DVCC lines at one point each via a ferrite-bead filter. Shorting the AGND and DGND patterns in one place immediately under the A/D converter improves A/D converter performance. - Ground the power supply pins (AVCC, DVCC1, DVCC2, DVEE3) as close to each pin as possible with a 0.1µF or larger ceramic chip capacitor. (Connect the AVCC pin to the AGND pattern and the DVCC1, DVCC2, DVEE3 pins to the DGND pattern.) - The digital output wiring should be as short as possible. If the digital output wiring is long, the wiring capacitance will increase, deteriorating the output slew rate and resulting in reflection to the output waveform since the original output slew rate is quite fast. • The analog input pin VIN has an input capacitance of approximately 21pF. To drive the A/D converter with proper frequency response, it is necessary to prevent perfor- mance deterioration due to parasitic capacitance or para- sitic inductance by using a large capacity drive circuit, keeping wiring as short as possible, and using chip parts for resistors and capacitors, etc. •The VRT and VRB pins must have adequate bypass to pro- tect them from high-frequency noise. Bypass them to AGND with approximately 1 µF tantal capacitor and, 0.1µF capacitor as short as possible. • When the digital input level is ECL or PECL level, ***/E pins should be used and ***/T pins left open. When the digital input level is TTL, ***/T pins should be used and III/E pins left open. TABLE 1. A/D CODE TABLE VIN STEP INV 10 D7 D0 D7 D0 VRT 255 1111111100000000 254 1111111000000001 • • • • • • • • • VRM2 128 1000000001111111 127 0111111110000000 • • • • • • • • • 1 0000000111111110 VRB 0 0000000011111111 Test Circuits FIGURE 4. CURRENT CONSUMPTION MEASUREMENT CIRCUIT FIGURE 5. INTEGRAL LINEARITY ERROR/DIFFERENTIAL LINEARITY ERROR MEASUREMENT CIRCUIT VRT VIN VRB AVCC DVCC1 DVCC2 DGND2 DGND1 AGND DGND3 CLK/E DVEE3 4V 1.95V 2V 5MHz PECL A A 5V 5V ICC IEE A < B A > B COMPARATOR A8 TO A1 B8 TO B1 B0 A0 HI3026A BUFFER CONTROLLER DVM 000...00 TO 111..10 VIN 8 “0” 8 “1” -V +V S2 S1: ON WHEN A < B S2: ON WHEN A > B S1 + - HI3026A |
Similar Part No. - HI3026A_03 |
|
Similar Description - HI3026A_03 |
|
|
|
Link URL |
| Privacy Policy |
| ALLDATASHEET.NET |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
