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MBM29F017A-12PNS Datasheet(PDF) 4 Page - SPANSION |
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MBM29F017A-12PNS Datasheet(HTML) 4 Page - SPANSION |
4 / 49 page MBM29F017A-70/-90/-12 3 s FEATURES • Single 5.0 V read, write, and erase Minimizes system level power requirements • Compatible with JEDEC-standard commands Pinout and software compatible with single-power supply Flash Superior inadvertent write protection • 48-pin TSOP, 40-pin SON • Minimum 100,000 write/erase cycles • High performance 70 ns maximum access time • Sector erase architecture Uniform sectors of 64K bytes each Any combination of sectors can be erased. Also supports full chip erase • Embedded EraseTM Algorithms Automatically pre-programs and erases the chip or any sector • Embedded ProgramTM Algorithms Automatically programs and verifies data at specified address •Data Polling and Toggle Bit feature for detection of program or erase cycle completion • Ready/BUSY output (RY/BY) Hardware method for detection of program or erase cycle completion •Low VCC write inhibit ≤ 3.2 V • Hardware RESET pin Resets internal state machine to the read mode • Erase Suspend/Resume Supports reading or programming data to a sector not being erased • Sector group protection Hardware method that disables any combination of sector groups from write or erase operation (a sector group consists of 4 adjacent sectors of 64K bytes each) • Temporary sector groups unprotection Hardware method temporarily enable any combination of sectors from write or erase operations |
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