© 2001 Fairchild Semiconductor Corporation

DS011360

www.fairchildsemi.com

February 1992

Revised June 2001

74LVQ374

Low Voltage Octal D-Type Flip-Flop

with 3-STATE Outputs

General Description

The LVQ374 is a high-speed, low-power octal D-type flip-

flop featuring separate D-type inputs for each flip-flop and

3-STATE outputs for bus-oriented applications. A buffered

Clock (CP) and Output Enable (OE) are common to all flip-

flops.

Features

s Ideal for low power/low noise 3.3V applications

s Implements patented EMI reduction circuitry

s Available in SOIC JEDEC, SOIC EIAJ and QSOP pack-

ages

s Guaranteed simultaneous switching noise level and

dynamic threshold performance

s Improved latch-up immunity

s Guaranteed incident wave switching into 75

Ω

s 4 kV minimum ESD immunity

s Buffered positive edge-triggered clock

s 3-STATE outputs drive bus lines or buffer memory

address registers

Ordering Code:

Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.

Logic Symbols

IEEE/IEC

Pin Descriptions

Connection Diagram

Truth Table

H

= HIGH Voltage Level

L

= LOW Voltage Level

X

= Immaterial

Z

= High Impedance

 = LOW-to-HIGH Transition

Order Number

Package Number

Package Description

74LVQ374SC

M20B

20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide

74LVQ374SJ

M20D

20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

74LVQ374QSC

MQA20

20-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150" Wide

Pin Names

Description

Data Inputs

CP

Clock Pulse Input

OE

3-STATE Output Enable Input

3-STATE Outputs

Inputs

Outputs

CP

OE

H



LH

L



LL

XX

H

Z