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74OL6011 Datasheet(PDF) 10 Page - Fairchild Semiconductor |
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74OL6011 Datasheet(HTML) 10 Page - Fairchild Semiconductor |
10 / 15 page 9/6/05 Page 10 of 15 © 2005 Fairchild Semiconductor Corporation TTL BUFFER 74OL6000 TTL INVERTER 74OL6001 CMOS BUFFER 74OL6010 CMOS INVERTER 74OL6011 LSTTL TO OPTOPLANAR® HIGH-SPEED LOGIC-TO-LOGIC OPTOCOUPLERS NOTE 1. The VCCO and VCCI supply voltages to the device must each be bypassed by a 0.1µF capacitor or larger. This can be either a ceramic or solid tantalum capacitor with good high frequency characteristics. Its purpose is to stabilize the operation of the high- gain amplifiers. Failure to provide the bypass will impair the DC and switching properties. The total lead length between capaci- tor and optocoupler should not exceed 1.5mm. See Fig. 20. 2. Device considered a two-terminal device. Pins 1, 2 and 3 shorted together, and Pins 4, 5 and 6 shorted together. 3. For example, assuming a VCCI of 5.0V, and an ambient temperature of 70°C, the maximum allowable VCCO is 12.1V. 3.2V 1.3V 90% 90% 10% INPUT, VI tPLH tPHL tr tf tf tr tPHL 1.3V 10% 1.3V OUTPUT, VO (74OL6000) OUTPUT, VO (74OL6001) tPLH Figure 17. 74OL6000/01 Switching Times vs. Ambient Temperature Figure 19. Common Mode Rejection Waveforms Figure 20. Suggested PCB Lay-Out 3.2V 1.3V 90% 50% 90% 50% 10% INPUT, VI tPLH tPHL tr tf tf tr tPHL 10% OUTPUT, VO (74OL6010) OUTPUT, VO (74OL6011) tPLH Figure 18. Switching Parameters 74OL6010/11 VCM VOH VOL 0V 50V dVCM dt VCM CMH CML VO = 2.0V (MIN.) VO = 0.8V (MAX.) tr = INPUT VCC BUS DATA IN INPUT GND BUS OUTPUT GND BUS OUTPUT VCC BUS .1 µF 1 2 3 .1 µF 6 5 4 DATA OUT |
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