Part Name
         Description
74VCX16501_04

 Low Voltage 18-Bit Universal Bus Transceivers with 3.6V Tolerant Inputs and Outputs ( 10 Page)


FAIRCHILD
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2
Connection Diagram
Pin Descriptions
Function Table (Note 2)
H
= HIGH Voltage Level
L
= LOW Voltage Level
X
= Immaterial (HIGH or LOW, inputs may not float)
Z
= High Impedance
Note 2: A-to-B data flow is shown; B-to-A flow is similar but uses OEBA,
LEBA and CLKBA. OEBA is active LOW.
Note 3: Output level before the indicated steady-state input conditions
were established.
Note 4: Output level before the indicated steady-state input conditions
were established, provided that CLKAB was HIGH before LEAB went LOW.
Pin Names
Description
OEAB
Output Enable Input for A to B Direction
(Active HIGH)
OEBA
Output Enable Input for B to A Direction
(Active LOW)
LEAB, LEBA
Latch Enable Inputs
CLKAB,
CLKBA
Clock Inputs
A1–A18
Side A Inputs or 3-STATE Outputs
B1–B18
Side B Inputs or 3-STATE Outputs
Inputs
Outputs
OEAB
LEAB
CLKAB
An
Bn
LX
X
X
Z
HH
X
L
L
HH
X
H
H
HL
LL
HL
HH
HL
H
X
B0 (Note 3)
HL
L
X
B0 (Note 4)
1  2  3  4  5  6  7  8  9  10 



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