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EL7630ICZ-T7 Datasheet(PDF) 7 Page - Intersil Corporation |
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EL7630ICZ-T7 Datasheet(HTML) 7 Page - Intersil Corporation |
7 / 7 page 7 All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com FN7371.1 February 22, 2006 The efficiency bench test results are shown in Figure 11. In the test, the input voltage is 4V and 2, 3, 4, 5 and 6 LEDs are used as the load (boost inductor L = 22µH Sumida CDRH5D28R-220NC). White LED Connections One leg of LEDs connected in series will ensure brightness uniformity. The 27V maximum output voltage specification enables up to 6 LEDs to be placed in series. In order to output more power to drive more LEDs, LEDs should be in series/parallel connection. Due to the LED's negative temperature coefficient, in each parallel branch, the driving source should be high impedance, to balance the LED current in each branch. One of the ways to ensure the brightness uniformity is to add mirror current balance circuit, built up with three transistors for the 15 LEDs series/parallel connection application shown in Figure 12. PCB Layout Considerations The PCB layout is very important for the converter to function properly. For the SC-70 6 pin package, Power Ground and Signal Ground should be separated to ensure the high pulse current in the power ground does not interfere with the sensitive signals connected to Signal Ground. Both grounds should only be connected at one point right at the chip. The heavy current loops (VIN-L1-LX-PGND, and VIN- L1-D1-C2-PGND) should be as short as possible. For the TSOT 5 pin package, there is no separated GND. All return GNDs should be connected in GND pin but with no sharing branch. Based on the signal level on each branch, the lower power level of the branch, the closer the branch to GND pin in order to minimize the branch interactive. The FB pin is most important. The current sense resistor RSET should be very close to this pin. If a long trace is required to the LEDs, a small decoupling capacitor should be placed at this pin. The heat of the IC is mainly dissipated through the PGND pin. Maximizing the copper area connected to this pin is preferable. In addition, a solid ground plane is always helpful for the EMI performance. The demo board is a good example of layout based on the principle. Please refer to the EL7630 Application Brief for the layout. FIGURE 11. EFFICIENCY CURVE WITH 2, 3, 4, 5 AND 6 LEDs LOAD 55 60 65 70 75 80 85 90 010 20 30 LED CURRENT (mA) 22µH,VIN=4V 3LED 4LED 5LED 2LED 6LED EL7630 C1 VDD LX ENAB FB GND L1 D1 C2 RSET VIN 2.7V~5.5V OFF/ON LEDs EL7630 VDD LX ENAB FB GND L1 D1 FIGURE 12. LEDs IN SERIES/PARALLEL WITH MIRROR CURRENT BALANCE EL7630 |
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