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X9313UP Datasheet(PDF) 1 Page - Intersil Corporation |
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X9313UP Datasheet(HTML) 1 Page - Intersil Corporation |
1 / 12 page 1 ® FN8177.5 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. XDCP is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005, 2006, 2007. All Rights Reserved All other trademarks mentioned are the property of their respective owners. X9313 Digitally Controlled Potentiometer (XDCP™) Linear, 32 Taps, 3 Wire Interface, Terminal Voltages ± VCC The Intersil X9313 is a digitally controlled potentiometer (XDCP). The device consists of a resistor array, wiper switches, a control section, and nonvolatile memory. The wiper position is controlled by a 3-wire interface. The potentiometer is implemented by a resistor array composed of 31 resistive elements and a wiper switching network. Between each element and at either end are tap points accessible to the wiper terminal. The position of the wiper element is controlled by the CS, U/D, and INC inputs. The position of the wiper can be stored in nonvolatile memory and then be recalled upon a subsequent power-up operation. The device can be used as a three-terminal potentiometer or as a two-terminal variable resistor in a wide variety of applications including: • Control • Parameter adjustments • Signal processing Features • Solid-state potentiometer • 3-wire serial interface • 32 wiper tap points - Wiper position stored in nonvolatile memory and recalled on power-up • 31 resistive elements - Temperature compensated - End to end resistance range ±20% - Terminal voltages, -VCC to +VCC • Low power CMOS -VCC = 3V or 5V - Active current, 3mA max. - Standby current, 500µA max. • High reliability - Endurance, 100,000 data changes per bit - Register data retention, 100 years •RTOTAL values = 1kΩ, 10kΩ, 50kΩ • Packages - 8 Ld SOIC, 8 Ld MSOP and 8 Ld PDIP • Pb-free plus anneal available (RoHS compliant) Block Diagram 5-BIT NONVOLATILE MEMORY STORE AND RECALL CONTROL CIRCUITRY ONE OF OUTPUTS RESISTOR ARRAY RH/VH U/D INC CS TRANSFER GATES THIRTY-TWO VCC VSS RL/VL RW/VW CONTROL UP/DOWN VCC (SUPPLY VOLTAGE) VSS (GROUND) RH/VH RW/VW RL/VL GENERAL DETAILED 0 1 2 28 29 30 31 (U/D) INCREMENT (INC) DEVICE SELECT (CS) AND MEMORY 5-BIT UP/DOWN COUNTER TIME DECODER ACTIVE AT A Data Sheet April 18, 2007 |
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