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X9520V20IZ-BT1 Datasheet(PDF) 4 Page - Intersil Corporation |
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X9520V20IZ-BT1 Datasheet(HTML) 4 Page - Intersil Corporation |
4 / 30 page 4 FN8206.1 January 3, 2006 Principles of Operation Serial Interface SERIAL INTERFACE CONVENTIONS The device supports a bidirectional bus oriented protocol. The protocol defines any device that sends data onto the bus as a transmitter, and the receiving device as the receiver. The device controlling the transfer is called the master and the device being controlled is called the slave. The master always initiates data transfers, and provides the clock for both transmit and receive operations. Therefore, the X9520 operates as a slave in all applications. SERIAL CLOCK AND DATA Data states on the SDA line can change only while SCL is LOW. SDA state changes while SCL is HIGH are reserved for indicating START and STOP conditions. See Figure 1. On power-up of the X9520, the SDA pin is in the input mode. SERIAL START CONDITION All commands are preceded by the START condition, which is a HIGH to LOW transition of SDA while SCL is HIGH. The device continuously monitors the SDA and SCL lines for the START condition and does not respond to any command until this condition has been met. See Figure 2. SERIAL STOP CONDITION All communications must be terminated by a STOP condition, which is a LOW to HIGH transition of SDA while SCL is HIGH. The STOP condition is also used to place the device into the Standby power mode after a read sequence. A STOP condition can only be issued after the transmitting device has released the bus. See Figure 2. 18 A1 V2RO V2 RESET Output. This open drain output makes a transition to a HIGH level when V2 is greater than VTRIP2, and goes LOW when V2 is less than VTRIP2. There is no power-up reset delay circuitry on this pin. The V2RO pin requires the use of an external “pull-up” resistor. 19 B2 V1RO V1/Vcc RESET Output. This is an active HIGH, open drain output which becomes active whenever V1/Vcc falls below VTRIP1. V1RO becomes active on power-up and remains active for a time tpurst after the power supply stabilizes (tpurst can be changed by varying the POR0 and POR1 bits of the internal control register). The V1RO pin requires the use of an external “pull-up” resistor. The V1RO pin can be forced active (HIGH) using the manual reset (MR) input pin. 20 A2 V1/Vcc Supply Voltage. Pin Descriptions (Continued) TSSOP CSP NAME FUNCTION SCL SDA Data Stable Data Change Data Stable FIGURE 1. VALID DATA CHANGES ON THE SDA BUS SCL SDA Start Stop FIGURE 2. VALID START AND STOP CONDITIONS X9520 |
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