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X98017L128-3.3 Datasheet(PDF) 2 Page - Intersil Corporation |
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X98017L128-3.3 Datasheet(HTML) 2 Page - Intersil Corporation |
2 / 29 page 2 FN8218.3 March 8, 2006 Block Diagram Ordering Information PART NUMBER PART MARKING MAXIMUM PIXEL RATE TEMP RANGE (°C) PACKAGE X98017L128-3.3 X98017L-3.3 170MHz 0 to 70 128 MQFP X98017L128-3.3-Z (See Note) X98017L-3.3Z 170MHz 0 to 70 128 MQFP (Pb-free) NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. G IN1 RGB GND1 G IN2 RGB GND2 V IN+ V IN- PGA 8 bit ADC + V CLAMP R IN1 R IN2 V IN+ V IN- PGA 8 bit ADC + V CLAMP B IN1 B IN2 V IN+ V IN- PGA 8 bit ADC + V CLAMP Offset DAC Offset DAC Offset DAC ABLC™ ABLC™ ABLC™ 8 10 8 10 8 10 8 B S[7:0] 8 B P[7:0] 8 G S[7:0] 8 G P[7:0] 8 R S[7:0] 8 R P[7:0] SOG IN1 SOG IN2 HSYNC IN1 HSYNC IN2 VSYNC IN1 VSYNC IN2 CLOCKINV XTAL IN XTAL OUT SCL SDA SADDR Sync Processing Digital PLL AFE Configuration and Control DATACLK DATACLK HS OUT VS OUT Serial Interface HSYNC OUT VSYNC OUT XTALCLK OUT X98017 |
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